丝印：65LVDS151；Package：TSSOP；MuxIt™ SERIALIZER-TRANSMITTER

FEATURES · A Member of the MuxIt™ Serializer-Deserializer Building-Block Chip Family · Supports Serialization of up to 10 Bits of Parallel Data Input at Rates up to 200 Mbps · PLL Lock/Valid Input Provided to Enable Link Data Transfers · Cascadable With Additional SN65LVDS151 MuxIt Serial

文件：281.46 Kbytes 页数：17 Pages

TI

德州仪器

丝印：65LVDS152；Package：TSSOP；MuxIt™ RECEIVER-DESERIALIZER

1FEATURES 2• A Member of the MuxIt™ Serializer- Deserializer Building-Block Chip Family • Supports Deserialization of One Serial Link Data Channel Input at Rates up to 200 Mbps • PLL Lock/Valid Input Provided to Enable Parallel Data and Clock Outputs • Cascadable With Additional SN65LVDS152

文件：239.32 Kbytes 页数：18 Pages

TI

德州仪器

丝印：65LVDS152；Package：TSSOP；MuxIt™ RECEIVER-DESERIALIZER

1FEATURES 2• A Member of the MuxIt™ Serializer- Deserializer Building-Block Chip Family • Supports Deserialization of One Serial Link Data Channel Input at Rates up to 200 Mbps • PLL Lock/Valid Input Provided to Enable Parallel Data and Clock Outputs • Cascadable With Additional SN65LVDS152

文件：239.32 Kbytes 页数：18 Pages

TI

德州仪器

丝印：65LVDS152；Package：TSSOP；MuxIt™ RECEIVER-DESERIALIZER

1FEATURES 2• A Member of the MuxIt™ Serializer- Deserializer Building-Block Chip Family • Supports Deserialization of One Serial Link Data Channel Input at Rates up to 200 Mbps • PLL Lock/Valid Input Provided to Enable Parallel Data and Clock Outputs • Cascadable With Additional SN65LVDS152

文件：239.32 Kbytes 页数：18 Pages

TI

德州仪器

丝印：65LVDS152；Package：TSSOP；MuxIt™ RECEIVER-DESERIALIZER

1FEATURES 2• A Member of the MuxIt™ Serializer- Deserializer Building-Block Chip Family • Supports Deserialization of One Serial Link Data Channel Input at Rates up to 200 Mbps • PLL Lock/Valid Input Provided to Enable Parallel Data and Clock Outputs • Cascadable With Additional SN65LVDS152

文件：239.32 Kbytes 页数：18 Pages

TI

德州仪器

丝印：65LVDS84AQ；Package：TSSOP；FLATLINK TRANSMITTER

21:3 Data Channel Compression at up to 196 Million Bytes per Second Throughput Suited for SVGA, XGA, or SXGA Data Transmission From Controller to Display With Very Low EMI 21 Data Channels Plus Clock In Low-Voltage TTL Inputs and 3 Data Channels Plus Clock Out Low-Voltage Differential Sign

文件：518.96 Kbytes 页数：22 Pages

TI

德州仪器

丝印：65LVDS84AQ；Package：TSSOP；FLATLINK TRANSMITTER

21:3 Data Channel Compression at up to 196 Million Bytes per Second Throughput Suited for SVGA, XGA, or SXGA Data Transmission From Controller to Display With Very Low EMI 21 Data Channels Plus Clock In Low-Voltage TTL Inputs and 3 Data Channels Plus Clock Out Low-Voltage Differential Sign

文件：518.96 Kbytes 页数：22 Pages

TI

德州仪器

丝印：65LVDS84AQ；Package：TSSOP；FLATLINK TRANSMITTER

21:3 Data Channel Compression at up to 196 Million Bytes per Second Throughput Suited for SVGA, XGA, or SXGA Data Transmission From Controller to Display With Very Low EMI 21 Data Channels Plus Clock In Low-Voltage TTL Inputs and 3 Data Channels Plus Clock Out Low-Voltage Differential Sign

文件：518.96 Kbytes 页数：22 Pages

TI

德州仪器

丝印：65LVDS84AQ；Package：TSSOP；FlatLink™ TRANSMITTER

1FEATURES 2· 21:3 Data Channel Compression at up to 196 Mbytes/s Throughput · Suited for SVGA, XGA, or SXGA Data Transmission From Controller to Display With Very Low EMI · 21 Data Channels Plus Clock In Low-Voltage TTL Inputs and 3 Data Channels Plus Clock Out Low-Voltage Differential Sig

文件：445.46 Kbytes 页数：18 Pages

TI

德州仪器

丝印：65LVDS84AQ；Package：TSSOP；FlatLink™ TRANSMITTER

1FEATURES 2· 21:3 Data Channel Compression at up to 196 Mbytes/s Throughput · Suited for SVGA, XGA, or SXGA Data Transmission From Controller to Display With Very Low EMI · 21 Data Channels Plus Clock In Low-Voltage TTL Inputs and 3 Data Channels Plus Clock Out Low-Voltage Differential Sig

文件：445.46 Kbytes 页数：18 Pages

TI

德州仪器