丝印：548A；Package：VSSOP；TCA9548A Low-Voltage 8-Channel I2C Switch with Reset

1 Features • 1-to-8 Bidirectional translating switches • I2C Bus and SMBus compatible • Active-low reset input • Three address pins, allowing up to eight TCA9548A devices on the I2C bus • Channel selection through an I2C Bus, in any combination • Power up with all switch channels deselecte

文件：2.5653 Mbytes 页数：39 Pages

TI

德州仪器

丝印：548AM-03LF；Package：SOIC；LOW SKEW CLOCK INVERTER AND DIVIDER

Features • Packaged in 16-pin SOIC (150 mil) • Input clock up to 160 MHz in the non-PLL mode • Provides clock outputs of CLK, CLK, and CLK/2 • Low skew (500 ps) on CLK, CLK, and CLK/2 • All outputs can be tri-stated • Entire chip can be powered down by changing one or two select pins • 3.3

文件：327.74 Kbytes 页数：8 Pages

RENESAS

瑞萨

丝印：548AM-03LF；Package：SOIC；LOW SKEW CLOCK INVERTER AND DIVIDER

Features • Packaged in 16-pin SOIC (150 mil) • Input clock up to 160 MHz in the non-PLL mode • Provides clock outputs of CLK, CLK, and CLK/2 • Low skew (500 ps) on CLK, CLK, and CLK/2 • All outputs can be tri-stated • Entire chip can be powered down by changing one or two select pins • 3.3

文件：327.74 Kbytes 页数：8 Pages

RENESAS

瑞萨

丝印：548AMI03LF；Package：SOIC；LOW SKEW CLOCK INVERTER AND DIVIDER

Features • Packaged in 16-pin SOIC (150 mil) • Input clock up to 160 MHz in the non-PLL mode • Provides clock outputs of CLK, CLK, and CLK/2 • Low skew (500 ps) on CLK, CLK, and CLK/2 • All outputs can be tri-stated • Entire chip can be powered down by changing one or two select pins • 3.3

文件：327.74 Kbytes 页数：8 Pages

RENESAS

瑞萨

丝印：548AMI03LF；Package：SOIC；LOW SKEW CLOCK INVERTER AND DIVIDER

Features • Packaged in 16-pin SOIC (150 mil) • Input clock up to 160 MHz in the non-PLL mode • Provides clock outputs of CLK, CLK, and CLK/2 • Low skew (500 ps) on CLK, CLK, and CLK/2 • All outputs can be tri-stated • Entire chip can be powered down by changing one or two select pins • 3.3

文件：327.74 Kbytes 页数：8 Pages

RENESAS

瑞萨

丝印：548AM-03LF；Package：SOIC；LOW SKEW CLOCK INVERTER AND DIVIDER

Features • Packaged in 16-pin SOIC (150 mil) • Input clock up to 160 MHz in the non-PLL mode • Provides clock outputs of CLK, CLK, and CLK/2 • Low skew (500 ps) on CLK, CLK, and CLK/2 • All outputs can be tri-stated • Entire chip can be powered down by changing one or two select pins • 3.3

文件：327.74 Kbytes 页数：8 Pages

RENESAS

瑞萨

丝印：548AM-03LF；Package：SOIC；LOW SKEW CLOCK INVERTER AND DIVIDER

Features • Packaged in 16-pin SOIC (150 mil) • Input clock up to 160 MHz in the non-PLL mode • Provides clock outputs of CLK, CLK, and CLK/2 • Low skew (500 ps) on CLK, CLK, and CLK/2 • All outputs can be tri-stated • Entire chip can be powered down by changing one or two select pins • 3.3

文件：327.74 Kbytes 页数：8 Pages

RENESAS

瑞萨

丝印：548AMI03LF；Package：SOIC；LOW SKEW CLOCK INVERTER AND DIVIDER

Features • Packaged in 16-pin SOIC (150 mil) • Input clock up to 160 MHz in the non-PLL mode • Provides clock outputs of CLK, CLK, and CLK/2 • Low skew (500 ps) on CLK, CLK, and CLK/2 • All outputs can be tri-stated • Entire chip can be powered down by changing one or two select pins • 3.3

文件：327.74 Kbytes 页数：8 Pages

RENESAS

瑞萨

丝印：548AMI03LF；Package：SOIC；LOW SKEW CLOCK INVERTER AND DIVIDER

Features • Packaged in 16-pin SOIC (150 mil) • Input clock up to 160 MHz in the non-PLL mode • Provides clock outputs of CLK, CLK, and CLK/2 • Low skew (500 ps) on CLK, CLK, and CLK/2 • All outputs can be tri-stated • Entire chip can be powered down by changing one or two select pins • 3.3

文件：327.74 Kbytes 页数：8 Pages

RENESAS

瑞萨

NPN Silicon Amplifier Transistor 625mW

Features • Lead Free Finish/RoHS Compliant (P Suffix designates RoHS Compliant. See ordering information) • Through Hole Package • 150°C Junction Temperature • Epoxy meets UL 94 V-0 flammability rating • Moisure Sensitivity Level 1 • Halogen free available upon request by adding suffix

文件：1.24071 Mbytes 页数：4 Pages

MCC