丝印：548AMI03LF；Package：SOIC；LOW SKEW CLOCK INVERTER AND DIVIDER

Features • Packaged in 16-pin SOIC (150 mil) • Input clock up to 160 MHz in the non-PLL mode • Provides clock outputs of CLK, CLK, and CLK/2 • Low skew (500 ps) on CLK, CLK, and CLK/2 • All outputs can be tri-stated • Entire chip can be powered down by changing one or two select pins • 3.3

文件：327.74 Kbytes 页数：8 Pages

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瑞萨

丝印：548AMI03LF；Package：SOIC；LOW SKEW CLOCK INVERTER AND DIVIDER

Features • Packaged in 16-pin SOIC (150 mil) • Input clock up to 160 MHz in the non-PLL mode • Provides clock outputs of CLK, CLK, and CLK/2 • Low skew (500 ps) on CLK, CLK, and CLK/2 • All outputs can be tri-stated • Entire chip can be powered down by changing one or two select pins • 3.3

文件：327.74 Kbytes 页数：8 Pages

RENESAS

瑞萨