丝印：1204；Package：VQFN；CDCLVP1204 Four LVPECL Output, High-Performance Clock Buffer

1 Features 1• 2:4 Differential Buffer • Selectable Clock Inputs Through Control Terminal • Universal Inputs Accept LVPECL, LVDS, and LVCMOS/LVTTL • Four LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 45 mA • Very Low Additive Jitter:

文件：863.58 Kbytes 页数：30 Pages

TI

德州仪器

丝印：1204；Package：VQFN(RGT)；CDCLVP1204 Four LVPECL Output, High-Performance Clock Buffer

1 Features 1• 2:4 Differential Buffer • Selectable Clock Inputs Through Control Terminal • Universal Inputs Accept LVPECL, LVDS, and LVCMOS/LVTTL • Four LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 45 mA • Very Low Additive Jitter:

文件：904.4 Kbytes 页数：33 Pages

TI

德州仪器

丝印：1204；Package：VQFN(RGT)；CDCLVP1204 Four LVPECL Output, High-Performance Clock Buffer

1 Features 1• 2:4 Differential Buffer • Selectable Clock Inputs Through Control Terminal • Universal Inputs Accept LVPECL, LVDS, and LVCMOS/LVTTL • Four LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 45 mA • Very Low Additive Jitter:

文件：904.4 Kbytes 页数：33 Pages

TI

德州仪器

丝印：1204；Package：VQFN(RGT)；CDCLVP1204 Four LVPECL Output, High-Performance Clock Buffer

1 Features 1• 2:4 Differential Buffer • Selectable Clock Inputs Through Control Terminal • Universal Inputs Accept LVPECL, LVDS, and LVCMOS/LVTTL • Four LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 45 mA • Very Low Additive Jitter:

文件：904.4 Kbytes 页数：33 Pages

TI

德州仪器

丝印：1204；Package：VQFN；CDCLVP1204 Four LVPECL Output, High-Performance Clock Buffer

1 Features 1• 2:4 Differential Buffer • Selectable Clock Inputs Through Control Terminal • Universal Inputs Accept LVPECL, LVDS, and LVCMOS/LVTTL • Four LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 45 mA • Very Low Additive Jitter:

文件：863.58 Kbytes 页数：30 Pages

TI

德州仪器

丝印：1204；Package：VQFN；CDCLVP1204 Four LVPECL Output, High-Performance Clock Buffer

1 Features 1• 2:4 Differential Buffer • Selectable Clock Inputs Through Control Terminal • Universal Inputs Accept LVPECL, LVDS, and LVCMOS/LVTTL • Four LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 45 mA • Very Low Additive Jitter:

文件：863.58 Kbytes 页数：30 Pages

TI

德州仪器

丝印：1204；Package：VQFN(RGT)；CDCLVP1204 Four LVPECL Output, High-Performance Clock Buffer

1 Features 1• 2:4 Differential Buffer • Selectable Clock Inputs Through Control Terminal • Universal Inputs Accept LVPECL, LVDS, and LVCMOS/LVTTL • Four LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 45 mA • Very Low Additive Jitter:

文件：904.4 Kbytes 页数：33 Pages

TI

德州仪器

丝印：1204；Package：VQFN(RGT)；CDCLVP1204 Four LVPECL Output, High-Performance Clock Buffer

1 Features 1• 2:4 Differential Buffer • Selectable Clock Inputs Through Control Terminal • Universal Inputs Accept LVPECL, LVDS, and LVCMOS/LVTTL • Four LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 45 mA • Very Low Additive Jitter:

文件：904.4 Kbytes 页数：33 Pages

TI

德州仪器

丝印：1204；Package：VQFN；CDCLVP1204 Four LVPECL Output, High-Performance Clock Buffer

1 Features 1• 2:4 Differential Buffer • Selectable Clock Inputs Through Control Terminal • Universal Inputs Accept LVPECL, LVDS, and LVCMOS/LVTTL • Four LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 45 mA • Very Low Additive Jitter:

文件：863.58 Kbytes 页数：30 Pages

TI

德州仪器

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