4M ??4 BANKS ??16 BIT DDR2 SDRAM

GENERAL DESCRIPTION The W9725G6JB is a 256M bits DDR2 SDRAM, organized as 4,194,304 words x 4 banks x 16 bits. This device achieves high speed transfer rates up to 1066Mb/sec/pin (DDR2-1066) for various applications. W9725G6JB is sorted into the following speed grades: -18, -25, 25I, 25A, 25K and

文件：1.4855 Mbytes 页数：87 Pages

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Double Data Rate architecture: two data transfers per clock cycle

文件：1.035859 Mbytes 页数：86 Pages

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DLL aligns DQ and DQS transitions with clock, Data masks (DM) for write data, Write Data Mask

文件：1.11353 Mbytes 页数：87 Pages

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DLL aligns DQ and DQS transitions with clock, Data masks (DM) for write data, Write Data Mask

文件：1.11353 Mbytes 页数：87 Pages

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DLL aligns DQ and DQS transitions with clock, Data masks (DM) for write data, Write Data Mask

文件：1.11353 Mbytes 页数：87 Pages

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DLL aligns DQ and DQS transitions with clock, Data masks (DM) for write data, Write Data Mask

文件：1.11353 Mbytes 页数：87 Pages

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4M X 4 BANKS X 16 BIT DDR2 SDRAM

文件：1.11353 Mbytes 页数：87 Pages

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DLL aligns DQ and DQS transitions with clock, Data masks (DM) for write data, Write Data Mask

文件：1.11353 Mbytes 页数：87 Pages

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DLL aligns DQ and DQS transitions with clock, Data masks (DM) for write data, Write Data Mask

文件：1.11353 Mbytes 页数：87 Pages

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双倍数据传输速率同步动态随机存取内存-2nd generation(第二代)

The W9725G6KB is a 256M bits DDR2 SDRAM, and speed involving -18, -25, 25I and -3 •Power Supply: VDD, VDDQ = 1.8 V ± 0.1 V\n• CAS Latency: 3, 4, 5, 6 and 7 \n• Bi-directional, differential data strobes (DQS and /DQS ) are transmitted / received with data\n• DLL aligns DQ and DQS transitions with clock\n• Data masks (DM) for write data \n• Posted /CAS programmable additive latenc;

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