丝印：V8%；Package：SC-70；20 V, single N-channel Trench MOSFET

文件：1.00855 Mbytes 页数：16 Pages

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安世安世半导体(中国)有限公司

丝印：V80；Package：SOT753；Single D-type flip-flop; positive-edge trigger

1. General description The 74LVC1G80 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and its complement will appear at the Q output. Inputs can be drive

文件：277.35 Kbytes 页数：19 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

丝印：V80；Package：SC-74A；Single D-type flip-flop; positive-edge trigger

1. General description The 74LVC1G80-Q100 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and its complement will appear at the Q output. Inputs can be

文件：252.86 Kbytes 页数：15 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

丝印：V86；Package：SOT753；2-input EXCLUSIVE-OR gate

1. General description The 74LVC1G86 provides the 2-input EXCLUSIVE-OR function. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment. This device is fully specified for partial Power-down applications using I

文件：255.83 Kbytes 页数：16 Pages

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安世安世半导体(中国)有限公司

丝印：V86；Package：SC-74A；2-input EXCLUSIVE-OR gate

1. General description The 74LVC1G86-Q100 provides the 2-input EXCLUSIVE-OR function. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment. This device is fully specified for partial Power-down applications us

文件：220.76 Kbytes 页数：11 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

丝印：V86；Package：SOT765-1；Dual 2-input EXCLUSIVE-OR gate

1. General description The 74LVC2G86 is a dual 2-input EXCLUSIVE-OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of s

文件：285.92 Kbytes 页数：18 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

丝印：V86；Package：SOT505-2；Dual 2-input EXCLUSIVE-OR gate

1. General description The 74LVC2G86 is a dual 2-input EXCLUSIVE-OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of s

文件：285.92 Kbytes 页数：18 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

丝印：V86；Package：SOT833-1；Dual 2-input EXCLUSIVE-OR gate

1. General description The 74LVC2G86 is a dual 2-input EXCLUSIVE-OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of s

文件：285.92 Kbytes 页数：18 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

丝印：V8；Package：SSOP5；VOLTAGE DETECTOR IC

VOLTAGE DETECTOR IC with counter timer BD45XXXG and BD46XXXG are series of high-accuracy detection voltage and low current consumption VOLTAGE DETECTOR ICs adopting CMOS process. New lineup of 156 types with delay time circuit have developed. Delay time is fixed in the IC due to the built-in co

文件：469.07 Kbytes 页数：4 Pages

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丝印：V8；Package：SSOP5；Counter Timer Built-in CMOS Voltage Detector IC Package SSOP5 is similar to SOT-23-5 (JEDEC)

VOLTAGE DETECTOR IC with counter timer BD45XXXG and BD46XXXG are series of high-accuracy detection voltage and low current consumption VOLTAGE DETECTOR ICs adopting CMOS process. New lineup of 156 types with delay time circuit have developed. Delay time is fixed in the IC due to the built-in co

文件：482.77 Kbytes 页数：16 Pages

ROHM

罗姆