P-Channel Enhancement-Mode Vertical DMOS FET

General Description The TP5335 is a low-threshold, Enhancement-mode (normally-off) transistor that utilizes an advanced vertical DMOS structure and a well-proven silicon gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors

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MICROCHIP

微芯科技

N-Channel Enhancement-Mode Vertical DMOS FETs

Low Threshold DMOS Technology These low threshold enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertexs well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the

文件：444.74 Kbytes 页数：2 Pages

SUTEX

P-Channel Enhancement-Mode Vertical DMOS FETs

Advanced DMOS Technology These enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedan

文件：434.9 Kbytes 页数：2 Pages

SUTEX

P-Channel Enhancement-Mode Vertical DMOS FET

文件：396.7 Kbytes 页数：3 Pages

SUTEX