N-Channel Enhancement-Mode Vertical DMOS FETs

General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors a

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SUTEX

N-Channel Enhancement-Mode Vertical DMOS FETs

Low Threshold DMOS Technology\nThese low threshold enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex's well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the h ■ Low threshold — 1.6V max.\n■ High input impedance\n■ Low input capacitance — 110pF typical\n■ Fast switching speeds\n■ Low on resistance\n■ Free from secondary breakdown\n■ Low input and output leakage\n■ Complementary N- and P-channel devicesApplications\n■ Logic level interfaces – ideal for TTL ;

Microchip

微芯科技

N-Channel Enhancement-Mode Vertical DMOS FET

General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors a

文件：458.44 Kbytes 页数：5 Pages

SUTEX

P-Channel Enhancement-Mode Vertical DMOS FETs

文件：477.09 Kbytes 页数：4 Pages

SUTEX

P-Channel Enhancement-Mode Vertical DMOS FET

文件：312.7 Kbytes 页数：14 Pages

Microchip

微芯科技

P-Channel Enhancement-Mode Vertical DMOS FET

文件：632.2 Kbytes 页数：5 Pages

SUTEX