7491

HEXFETPowerMOSFET

Benefits ●LowGatetoDrainChargetoReduceSwitchingLosses ●FullyCharacterizedCapacitanceIncludingEffectiveCOSStoSimplifyDesign,(SeeApp.NoteAN1001) ●FullyCharacterizedAvalancheVoltageandCurrent Applications ●HighfrequencyDC-DCconverters ●Lead-Free

7491

BipolarTransistor-50V,-0.4A,LowVCE(sat)PNPSingleSSFP

BipolarTransistor –50V,–0.4A,LowVCE(sat)PNPSingleSSFP Features •Largecurrentcapacity •Lowcollector-to-emittersaturationvoltage(resistance):RCE(sat)typ=210mΩ[IC=0.5A,IB=50mA] •Ultrasmallpackagefacilitatesminiaturizationinendproducts •SmallON-resistance(Ron) Appli

7491

HEXFETPowerMOSFET

Benefits ●LowGatetoDrainChargetoReduceSwitchingLosses ●FullyCharacterizedCapacitanceIncludingEffectiveCOSStoSimplifyDesign,(SeeApp.NoteAN1001) ●FullyCharacterizedAvalancheVoltageandCurrent Applications ●HighfrequencyDC-DCconverters

ANX7491

10GActiveMux(1x2)withIntegratedRe-timerforUSB3.2

Features *Built-inre-timer ㅡIntegratedre-timerforUSB3.2uptoGen2@10Gbps —SupportsbothSeparateReferenceClockIndependentSSC(SRIS)andBit-LevelRe-timer(BLR)ArchitecturesofUSB3.2Specification(Appendix-E) —Supportsbothhost(source)anddevice(sink)applicationsinUS

ANX7491

20GActiveRetimerforUSB3.2

Features Built-inre-timer -Integratedre-timerforUSB3.2withtwolanesuptoGen2@10Gbpseachforacombined20Gthroughput -SupportsbothSeparateReferenceClockIndependentSSC(SRIS)andBit-LevelRe-timer(BLR)ArchitecturesofUSB3.2Specification -Supportsbothhost(source)

ANX7491

10GActiveMux(1x2)withIntegratedRe-timerandCCDetectionforUSB3.2

Features Built-inre-timer −Integratedre-timerforUSB3.2uptoGen2@10Gbps −SupportsbothSeparateReferenceClockIndependentSSC(SRIS)andBit-LevelRe-timer(BLR)ArchitecturesofUSB3.2Specification(Appendix-E) −Losscompensationtorecoverupto23dBchannelloss Integrat

ANX7491

20GActiveMux(2x2)withIntegratedRe-timerandCCDetectionforUSB3.2

Features Built-inre-timer −Integratedre-timerforUSB3.2uptoGen2@2x10Gbpsforacombined20Gdatathroughput −SupportsbothSeparateReferenceClockIndependentSSC(SRIS)andBit-LevelRe-timer(BLR)ArchitecturesofUSB3.2Specification(Appendix-E) −Supportsbothhost(source

ANX7491

106ActiveMux(6x4)withIntegratedRe-timersforUSB3.2/DisplayPort1.4

Features *Built-inre-timers —Integratedre-timersforUSB3.2uptoGen2@10Gbps —SupportsbothSeparateReferenceClockIndependentSSC(SRIS)andBit-LevelRe-timer(BLR)ArchitecturesofUSB3.2Specification(Appendix-E) —Integratedre-timers(Linktraining-tunablePHYrepeater)forD

ANX7491

10GActiveMux(4x4)withIntegratedRe-timersforUSB3.2/DisplayPort™

Features Built-inre-timers −Integratedre-timersforUSB3.2uptoGen2@10Gbps −US3.2Specification(Appendix-E)compliantre-timer −SupportsbothSeparateReferenceClockIndependentSSC(SRIS)andBit-LevelRe-timer(BLR)ArchitecturesofUSB3.2Specification(Appendix-E) −Integrat

ANX7491

12GActiveRedriverwithLinearEqualizationforHDMI2.1

Features Built-inCTLEredrivers -Independentchannelconfiguration -Losscompensationtorecoverupto-12dBchannelloss@12Gbps FourlanesofHDMI2.1upto12Gbps -SupportsDP++ Serialanddebuginterfaces -I2CSlaveinterface,upto1MHz,forredriverconfiguration Indust