首页 >TC74HC73P>规格书列表
| 零件编号 | 下载 订购 | 功能描述/丝印 | 制造商 上传企业 | LOGO |
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DualJKflip-flopwithreset;negative-edgetrigger Generaldescription The74HC73isahigh-speedSi-gateCMOSdeviceandispincompatiblewithlow-powerSchottkyTTL(LSTTL).The74HC73isspecifiedincompliancewithJEDECstandardno.7A. Features Low-powerdissipation ComplieswithJEDECstandardno.7A ESDprotection: | PhilipsPhilips Semiconductors 飞利浦荷兰皇家飞利浦 | Philips | ||
DualJKflip-flopwithreset;negative-edgetrigger 1.Generaldescription The74HC73isadualnegativeedgetriggeredJKflip-flopwithindividualJ,K,clock(nCP)and reset(nR)inputsandcomplementarynQandnQoutputs.TheJandKinputsmustbestable oneset-uptimepriortotheHIGH-to-LOWclocktransitionforpredictableoperation.(n | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
DualJKflip-flopwithreset;negative-edgetrigger 1.Generaldescription The74HC73isadualnegativeedgetriggeredJKflip-flopwithindividualJ,K,clock(nCP)and reset(nR)inputsandcomplementarynQandnQoutputs.TheJandKinputsmustbestable oneset-uptimepriortotheHIGH-to-LOWclocktransitionforpredictableoperation.(n | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
DualJKflip-flopwithreset;negative-edgetrigger Generaldescription The74HC73isahigh-speedSi-gateCMOSdeviceandispincompatiblewithlow-powerSchottkyTTL(LSTTL).The74HC73isspecifiedincompliancewithJEDECstandardno.7A. Features Low-powerdissipation ComplieswithJEDECstandardno.7A ESDprotection: | PhilipsPhilips Semiconductors 飞利浦荷兰皇家飞利浦 | Philips | ||
DualJKflip-flopwithreset;negative-edgetrigger Generaldescription The74HC73isahigh-speedSi-gateCMOSdeviceandispincompatiblewithlow-powerSchottkyTTL(LSTTL).The74HC73isspecifiedincompliancewithJEDECstandardno.7A. Features Low-powerdissipation ComplieswithJEDECstandardno.7A ESDprotection: | PhilipsPhilips Semiconductors 飞利浦荷兰皇家飞利浦 | Philips | ||
DualJKflip-flopwithreset;negative-edgetrigger Generaldescription The74HC73isahigh-speedSi-gateCMOSdeviceandispincompatiblewithlow-powerSchottkyTTL(LSTTL).The74HC73isspecifiedincompliancewithJEDECstandardno.7A. Features Low-powerdissipation ComplieswithJEDECstandardno.7A ESDprotection: | PhilipsPhilips Semiconductors 飞利浦荷兰皇家飞利浦 | Philips | ||
DualJKflip-flopwithreset;negative-edgetrigger 1.Generaldescription The74HC73isadualnegativeedgetriggeredJKflip-flopwithindividualJ,K,clock(nCP)and reset(nR)inputsandcomplementarynQandnQoutputs.TheJandKinputsmustbestable oneset-uptimepriortotheHIGH-to-LOWclocktransitionforpredictableoperation.(n | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
DualJKflip-flopwithreset;negative-edgetrigger Generaldescription The74HC73isahigh-speedSi-gateCMOSdeviceandispincompatiblewithlow-powerSchottkyTTL(LSTTL).The74HC73isspecifiedincompliancewithJEDECstandardno.7A. Features Low-powerdissipation ComplieswithJEDECstandardno.7A ESDprotection: | PhilipsPhilips Semiconductors 飞利浦荷兰皇家飞利浦 | Philips | ||
DualJ-KFlip-FlopwithResetNegative-EdgeTrigger | TITexas Instruments 德州仪器美国德州仪器公司 | TI | ||
DualJ-KFlip-FlopwithResetNegative-EdgeTrigger | TITexas Instruments 德州仪器美国德州仪器公司 | TI |
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