3-STATE HEX BUFFERS

DESCRIPTION These devices are high-speed Hex Buffers with 3- state outputs. They are organized as single 6-bit or 2-bit/4-bit, with inverting or non-inverting data (D) paths. The outputs are designed to drive 15 TTL Unit Loads or 60 Low Power Schottky loads when the Enable (E) is LOW. When

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3-STATE HEX BUFFERS

DESCRIPTION These devices are high-speed Hex Buffers with 3- state outputs. They are organized as single 6-bit or 2-bit/4-bit, with inverting or non-inverting data (D) paths. The outputs are designed to drive 15 TTL Unit Loads or 60 Low Power Schottky loads when the Enable (E) is LOW. When

文件：87.15 Kbytes 页数：4 Pages

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Octal D-type flip-flop with 3-state outputs

DESCRIPTION The T74LS374 is a high-speed, low-power Octal D-type Flip-Flop featuring separate D-type inputs for each flip-flop and 3-state outputs for oriented applications. A buffered Clock (CP) and Output Enable (OE) are common to all flip-flops. ■ EDGE-TRIGGERED D-TYPE INPUTS ■ BUFFERED POSI

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Octal D-type flip-flop with 3-state outputs

DESCRIPTION The T74LS374 is a high-speed, low-power Octal D-type Flip-Flop featuring separate D-type inputs for each flip-flop and 3-state outputs for oriented applications. A buffered Clock (CP) and Output Enable (OE) are common to all flip-flops. ■ EDGE-TRIGGERED D-TYPE INPUTS ■ BUFFERED POSI

文件：379.38 Kbytes 页数：5 Pages

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Hex Parallel D register with enable

DESCRIPTION The T74LS378 is an 16-Bit Register with a buffered common enable. This device is similar to the T74LS174, but with common Enable rather than common Master Reset. ■ 8-BIT HIGH SPEED PARALLEL REGISTER ■ POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOPS ■ FULLY BUFFERED COMMON CLOCK AND ENABL

文件：344.64 Kbytes 页数：4 Pages

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Hex Parallel D register with enable

DESCRIPTION The T74LS378 is an 16-Bit Register with a buffered common enable. This device is similar to the T74LS174, but with common Enable rather than common Master Reset. ■ 8-BIT HIGH SPEED PARALLEL REGISTER ■ POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOPS ■ FULLY BUFFERED COMMON CLOCK AND ENABL

文件：344.64 Kbytes 页数：4 Pages

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Quad parallel register with enable

DESCRIPTION The T74LS379 is a 4-Bit Register with a buffered common Enable. This device is similar to the T74LS175, but feature the common Enable rather than common Master Reset. ■ EDGE-TRIGGERED D-TYPE INPUTS ■ BUFFERED POSITIVE EDGE-TRIGGERED CLOCK ■ BUFFERED COMMON ENABLE INPUT ■ TRUE AND

文件：325.02 Kbytes 页数：4 Pages

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Quad parallel register with enable

DESCRIPTION The T74LS379 is a 4-Bit Register with a buffered common Enable. This device is similar to the T74LS175, but feature the common Enable rather than common Master Reset. ■ EDGE-TRIGGERED D-TYPE INPUTS ■ BUFFERED POSITIVE EDGE-TRIGGERED CLOCK ■ BUFFERED COMMON ENABLE INPUT ■ TRUE AND

文件：325.02 Kbytes 页数：4 Pages

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3-STATE HEX BUFFERS

DESCRIPTION These devices are high-speed Hex Buffers with 3- state outputs. They are organized as single 6-bit or 2-bit/4-bit, with inverting or non-inverting data (D) paths. The outputs are designed to drive 15 TTL Unit Loads or 60 Low Power Schottky loads when the Enable (E) is LOW. When

文件：87.15 Kbytes 页数：4 Pages

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T74 - EXCELON® Modular System 2/2- and 3/2 shut-off valve

Medium: Compressed air only Maximum operating pressure: 17 bar (250 psi) Port size: G3/8, G1/2, G3/4, 3/8 PTF 1/2 PTF , 3/8 PTF CV factor: From IN to OUT ports: 3/8”: 7,1; 1/2”: 8,1; 3/4”: 7,7 0,2 from OUT to Exhaust ports on 3/2 valves Ambient/Media temperature: -34° ... +65°C (-30°

文件：929.76 Kbytes 页数：3 Pages

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