3-STATE HEX BUFFERS

DESCRIPTION These devices are high-speed Hex Buffers with 3- state outputs. They are organized as single 6-bit or 2-bit/4-bit, with inverting or non-inverting data (D) paths. The outputs are designed to drive 15 TTL Unit Loads or 60 Low Power Schottky loads when the Enable (E) is LOW. When

文件：87.15 Kbytes 页数：4 Pages

STMICROELECTRONICS

意法半导体

HEX BUS DROVERS WITH 3-STATE OUTPUTS

文件：682.96 Kbytes 页数：21 Pages

TI

德州仪器

Hex TRI-STATE Inverting Buffers

文件：137.44 Kbytes 页数：6 Pages

NSC

国半

Hex TRI-STATE(RM) Inverting Buffers

文件：387.43 Kbytes 页数：8 Pages

TI

德州仪器