T431616C中文资料凯钰科技数据手册PDF规格书

GRNERAL DESCRIPTION

The T431616C is 16,777,216 bits synchronous high data rate Dynamic RAM organized as 2 x 524,288 words by 16 bits , fabricated with high performance CMOS technology . Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle . Range of operating frequencies , programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth , high performance memory system applications.

FEATURES

• 3.3V power supply

• Clock cycle time : 6 / 7 ns

• Dual banks operation

• LVTTL compatible with multiplexed address

• All inputs are sampled at the positive going edge of system clock

• Burst Read Single-bit Write operation

• DQM for masking

• Auto refresh and self refresh

• 32ms refresh period (2K cycle)

• MRS cycle with address key programs

- CAS Latency ( 2 & 3 )

- Burst Length ( 1 , 2 , 4 , 8 & full page)

- Burst Type (Sequential & Interleave)

• Available package type :

- 50 pin TSOP(II)/lead-free

• Operating temperature : - 0 ~ +70 °C