T35L6432B中文资料64K x 32 SRAM数据手册TM规格书

描述 Description

GENERAL DESCRIPTION
The Taiwan Memory Technology Synchronous Burst RAM family employs high-speed, low power CMOS design using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high valued resistors.
The T35L6432B SRAM integrates 65536 x 32 SRAM cells with advanced synchronous peripheral circuitry and a 2-bit counter for internal burst operation.FEATURES
• Fast Access times: 9 / 10 / 11 / 12 ns
• Single 3.3V (+0.3V/-0.165V) power supply
• Common data inputs and data outputs
• Individual BYTE WRITE ENABLE and GLOBAL WRITE control
• Three chip enables for depth expansion and address pipelining
• Clock-controlled and registered address, data I/Os and control signals
• Internally self-timed WRITE CYCLE
• Burst control pins ( interleaved or linear burst sequence)
• High 30pF output drive capability at rated access time
• SNOOZE MODE for reduced power standby
• Burst Sequence :
   - Interleaved (MODE=NC or VCC)
   - Linear (MODE=GND)

特性 Features

• Fast Access times: 9 / 10 / 11 / 12 ns
• Single 3.3V (+0.3V/-0.165V) power supply
• Common data inputs and data outputs
• Individual BYTE WRITE ENABLE and GLOBAL WRITE control
• Three chip enables for depth expansion and address pipelining
• Clock-controlled and registered address, data I/Os and control signals
• Internally self-timed WRITE CYCLE
• Burst control pins ( interleaved or linear burst sequence)
• High 30pF output drive capability at rated access time
• SNOOZE MODE for reduced power standby
• Burst Sequence :
   - Interleaved (MODE=NC or VCC)
   - Linear (MODE=GND)