T35L6432A-4.5Q中文资料64K x 32 SRAM数据手册TM规格书

描述 Description

GENERAL DESCRIPTION
The Taiwan Memory Technology Synchronous Burst RAM family employs: high-speed, low power CMOS design using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high valued resistors.FEATURES
■ Fast Access times: 4.5, 5, 6, 7, and 8ns
■ Fast clock speed: 125,100, 83, 66, and 50 MHz
■ Provide high performance 3-1-1-1 access rate
■ Fast OE access times: 4.5, 5 and 6ns
■ Single 3.3V +10%/-5% power supply
■ Common data inputs and data outputs
■ BYTE WRITE ENABLE and GLOBAL WRITE control
■ Three chip enables for depth expansion and address pipelining
■ Address, control, input, and output pipelined registers
■ Internally self-timed WRITE CYCLE
■ WRITE pass-through capability
■ Burst control pins ( interleaved or linear burst sequence)
■ High density, high speed packages
■ Low capacitive bus loading
■ High 30pF output drive capability at rated access time
■ SNOOZE MODE for reduced power standby
■ Single cycle disable ( PentiumTM BSRAM compatible )

特性 Features

■ Fast Access times: 4.5, 5, 6, 7, and 8ns
■ Fast clock speed: 125,100, 83, 66, and 50 MHz
■ Provide high performance 3-1-1-1 access rate
■ Fast OE access times: 4.5, 5 and 6ns
■ Single 3.3V +10%/-5% power supply
■ Common data inputs and data outputs
■ BYTE WRITE ENABLE and GLOBAL WRITE control
■ Three chip enables for depth expansion and address pipelining
■ Address, control, input, and output pipelined registers
■ Internally self-timed WRITE CYCLE
■ WRITE pass-through capability
■ Burst control pins ( interleaved or linear burst sequence)
■ High density, high speed packages
■ Low capacitive bus loading
■ High 30pF output drive capability at rated access time
■ SNOOZE MODE for reduced power standby
■ Single cycle disable ( PentiumTM BSRAM compatible )