SY89826L中文资料Buffers数据手册Microchip规格书

描述 Description

The SY89826L is a precision fanout buffer with 22 differential LVDS (Low Voltage Differential Swing) output pairs. The part is designed for use in low voltage 3.3V applications that require a large number of outputs to drive precisely aligned, ultra low-skew signals to their destination.The input is multiplexed from either LVDS or LVPECL (Low Voltage Positive Emitter Coupled Logic) by the CLK_SEL pin. The OE (Output Enable) is synchronous so that the outputs will only be enabled/disabled when they are already in the LOW state. This avoids any chance of generating a runt clock pulse when the device is enabled/disabled as can happen with an asynchronous control.The SY89826L features a low pin-to-pin skew of less than 50ps--performance previously unachievable in a standard product having such a high number of outputs.The SY89826L is available in a single space saving package, enabling a lower overall cost solution.

特性 Features

• High-performance, 1GHz LVDS fanout buffer/ translator
• 22 differential LVDS output pairs
• Guaranteed AC parameters over temperature and voltage:
• >1GHz fMAX
• <50ps within device skew
• <400ps tr/tf time
• Low jitter performance
• <1psrms cycle-to-cycle jitter
• <1ps (pk-pk) total jitter
• 2:1 mux input accepts LVDS and LVPECL
• 3.3V supply voltage
• LVDS input includes internal 100Ω termination
• Output enable function
• Available in a 64-Pin EPAD-TQFP

简介

SY89826L属于集成电路（IC）的时钟缓冲器驱动器。由制造生产的SY89826L时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。