SY100E417中文资料Translators Products数据手册Microchip规格书

描述 Description

The SY100E417 is a quint LVPECL-to-PECL translator. It can also be used as a quint PECL-to-LVPECL translator. The device receives standard PECL signals and translates them to differential LVPECL output signals (or vice versa).The SY100E417 can also be used as a differential line receiver for PECL-to-PECL or LVPECL-to-LVPECL signals. However, please note that for the latter we will need two different power supplies. Please refer to Function Table for more details.A VBB output is provided for interfacing single ended input signals. If a single ended input is to be used, the VBB output should be connected to the Dn input and the active signal will drive the Dn input. When used, the VBB should be bypassed to VCC via a 0.01µF capacitor. The VBB is designed to act as a switching reference for the SY100E417 under single ended input conditions. As a result, the pin can only source/sink 0.5mA of current.To accomplish the PECL-to-LVPECL level translation, the SY100E417 requires three power rails. The VCC and VCC_VBB supply is to be connected to the standard PECL supply, the 3.3V supply is to be connected to the VCCOsupply, and GND is connected to the system ground plane. Both the VCC and VCCO should be bypassed to ground with a 0.01µF capacitor.To accomplish the LVPECL-to-PECL level translation, the SY100E417 requires three power rails as well. The 5.0V supply is connected to the VCC and VCCO pins, 3.3V supply is connected to the VCC_VBB pin and GND is connected to the system ground plane. VCC_VBB is used to provide a proper VBB output level if a single ended input is used. VCC_VBB= 3.3V is only required for single-ended LVPECL input. For differential LVPECL input, VCC_VBB can be either 3.3V or 5.0V.Under open input conditions, the Dn input will be biased at a VCC/2 voltage level and the Dn input will be pulled to GND. This condition will force the \"Qn\" output low, ensuring stability.

特性 Features

·3.3V and 5V power supplies required
·Also, supports LVPECL-to-PECL translation
·500ps propagation delays
·Fully differential design
·Differential line receiver capability
·Available in 28-pin PLCC package

简介

SY100E417属于集成电路（IC）的转换器电平移位器。由制造生产的SY100E417转换器，电平移位器逻辑转换器或电平移位器 IC 可用于在数字逻辑设备之间传递信息，这些设备可在不同/不兼容的供电电压下工作，或可实现不同的信令方式。例如，可以将需要 5 V 电源的数字输出传感器连接到具有 3.3 V I/O 电源的 FPGA，或者在 CMOS 或 TTL 等单端信令方式与 PECL 或 LVDS 等差分技术之间进行转换。