SPC5643AF0MLU2

MPC5644A Microcontroller Data Sheet

Description Themicrocontroller’se200z4hostprocessorcoreisbuiltonPowerArchitecture®technologyanddesignedspecificallyforembeddedapplications.InadditiontothePowerArchitecturetechnology,thiscoresupportsinstructionsfordigitalsignalprocessing(DSP). TheMPC5644Ahas

SPC5643AF0MLU2

NXP 32-bit MCU, Power Arch core, 3MB Flash, 120MHz, -40/+125degC, Automotive Grade, QFP 176; • Up to 150 MHz Power Architecture® core with up to two instructions per cycle\n• Up to 4 MB of on-chip flash memory with error correcting codes (ECC) and read while write (RWW) options\n• Up to 192 KB on-chip RAM with standby functionality (32 KB) and ECC\n• 8 KB instruction cache (with line locking), configurable as two- or four-way\n• 3× eSCI, 3× DSPI with microsecond bus support and a reaction module\n• 3× FlexCAN with 64 messages buffers, 1× FlexRayTM module (v2.1)\n• 32-channel eTPU2 (second generation eTPU) and 24 unified eMIOS channels\n• Up to 40 channels ADC (Dual ADC) with 670 ns conversion time\n• 5-volt single supply with external ballast with multiple external supply: 5V, 3.3V and 1.2V\n• Power reduction modes: slow, stop and stand-by modes\n • This product is included in NXP®.s product longevity program, with assured supply for a minimum of 15 years after launch\n• Ultra-Reliable MCUs\n;

The MPC564xA family of MCUs offers enhanced powertrain functionality and addresses the harsh environments of mid-range gasoline and direct injection engines, advanced transmissions, and industrial applications.\nDesigned to help lower overall system costs\nOffers higher performance than single-issue cores at the same frequency\nOperates at low power for high-temperature environments, such as transmissions\nEnables precision tuning to optimize fuel economy and reduce emissions\nImproves shift control \n