MPC5644A Microcontroller Data Sheet

Description The microcontroller’s e200z4 host processor core is built on Power Architecture® technology and designed specifically for embedded applications. In addition to the Power Architecture technology, this core supports instructions for digital signal processing (DSP). The MPC5644A has

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freescaleFreescale Semiconductor, Inc

飞思卡尔飞思卡尔半导体

NXP 32-bit MCU, Power Arch core, 3MB Flash, 120MHz, -40/+125degC, Automotive Grade, QFP 176

The MPC564xA family of MCUs offers enhanced powertrain functionality and addresses the harsh environments of mid-range gasoline and direct injection engines, advanced transmissions, and industrial applications.\nDesigned to help lower overall system costs\nOffers higher performance than single-issue • Up to 150 MHz Power Architecture® core with up to two instructions per cycle\n• Up to 4 MB of on-chip flash memory with error correcting codes (ECC) and read while write (RWW) options\n• Up to 192 KB on-chip RAM with standby functionality (32 KB) and ECC\n• 8 KB instruction cache (with line lockin;

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恩智浦

NXP
BGA324

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ST
PBGA-324

ST

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NXP
324-BBGA

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