MPC5643L Microcontroller Data Sheet

• High-performance e200z4d dual core — 32-bit Power Architecture® technology CPU — Core frequency as high as 120 MHz — Dual issue five-stage pipeline core — Variable Length Encoding (VLE) — Memory Management Unit (MMU) — 4 KB instruction cache with error detection code — Signal processing e

文件：1.18195 Mbytes 页数：136 Pages

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Qorivva Microcontroller

文件：739.78 Kbytes 页数：136 Pages

freescaleFreescale Semiconductor, Inc

飞思卡尔飞思卡尔半导体

NXP 32-bit MCU, Dual Power Arch, 1MB Flash, 120MHz, -40/+125degC, Automotive Qual, MAPBGA 257

The MPC5643L 32-bit MCU built on Power Architecture® technology reduces design complexity and component count by putting key functional safety features on a single chip. It specifically addresses the ISO 26262 safety standard up to the most stringent ASIL D requirements. • Dual e200 Z4 CPU architecture\n• Dual processing spheres including; CPU, DMA, interrupt controller, crossbar and MPU for logic level fault detection\n• Two statically configurable modes of operation: Lockstep operation (redundant processing and calculations) and dual parallel mode (independant cor;

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恩智浦

MPC5643L Microcontroller Data Sheet

• High-performance e200z4d dual core — 32-bit Power Architecture® technology CPU — Core frequency as high as 120 MHz — Dual issue five-stage pipeline core — Variable Length Encoding (VLE) — Memory Management Unit (MMU) — 4 KB instruction cache with error detection code — Signal processing e

文件：1.18195 Mbytes 页数：136 Pages

恩XP