SN74LVC2G79中文资料双路正边沿触发式 D 型触发器数据手册TI规格书

描述 Description

This dual positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation. When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

特性 Features

• Available in the Texas Instruments NanoFree Package
• Inputs Accept Voltages to 5.5 V
• Low Power Consumption, 10-μA Max ICC
• Typical VOLP (Output Ground Bounce) CC = 3.3 V, TA = 25°C
• Ioff Feature Supports Live Insertion, Partial-Power-Down Mode Operation and Back Drive Protection
• ESD Protection Exceeds JESD 22
• 200-V Machine Model (A115-A)
• 1000-V Charged-Device Model (C101)