SN74LVC2G08-EP中文资料增强型产品 2 通道、2 输入、1.65V 至 5.5V 与门数据手册TI规格书

描述 Description

This dual 2-input positive-AND gate is designed for 1.65-V to 5.5-V VCC operation. The SN74LVC2G08 performs the Boolean function Y = A • or Y = A\\ + B\\ in positive logic. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

特性 Features

• Controlled Baseline
• One Test Site
• Enhanced Diminishing Manufacturing Sources (DMS) Support
• Qualification Pedigree
• Inputs Accept Voltages to 5.5 V
• Low Power Consumption, 10 µA Max ICC
• Typical VOLP (Output Ground Bounce) CC = 3.3 V, TA = 25°C
• Ioff Supports Partial-Power-Down Mode Operation
• ESD Protection Exceeds JESD 22
• 1000-V Charged-Device Model (C101)


Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.