SN74LVC2G00W-EP中文资料增强型产品 2 通道、2 输入、1.65V 至 5.5V 与非门数据手册TI规格书

描述 Description

This dual 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCC operation. The SN74LVC2G00W-EP performs the Boolean function Y = A • B or Y = A + B in positive logic. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

特性 Features

• Controlled Baseline
• Extended Temperature Performance of -55°C to 115°C
• Enhanced Product-Change Notification
• Supports 5-V VCC Operation
• Max tpd of 5.3 ns at 3.3 V
• ±24-mA Output Drive at 3.3 V
• Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• 2000-V Human-Body Model (A114-A)
• 1000-V Charged-Device Model (C101)

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specifiedperformance and environmental limits.