SN74LV8T541-EP中文资料具有三态输出的 8 位固定方向电平转换器（增强型产品）数据手册TI规格书

描述 Description

The SN74LV8T541-EP contains eight buffers with 3-state outputs. The active low output enable pins (OE1 and OE2) control all eight channels, and are configured so that both must be low for the outputs to be active. When the outputs are enabled, the outputs are actively driven low or high. When the outputs are disabled, the outputs are set into the high-impedance state. The output level is referenced to the supply voltage (VCC) and supports 1.8V, 2.5V, 3.3V, and 5V CMOS levels.

The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2V input to 1.8V output or 1.8V input to 3.3V output). In addition, the 5V tolerant input pins enable down translation (for example, 3.3V to 2.5V output).

特性 Features

Wide operating range of 1.65V to 5.5V

5.5V tolerant input pins

Single-supply voltage translator (refer to LVxT Enhanced Input Voltage):

Up translation:

1.2V to 1.8V

1.5V to 2.5V

1.8V to 3.3V

3.3V to 5.0V



Down translation:

5.0V, 3.3V, 2.5V to 1.8V

5.0V, 3.3V to 2.5V

5.0V to 3.3V





Up to 150Mbps with 5V or 3.3V VCC

Supports standard function pinout

Latch-up performance exceeds 250mAper JESD 17

Supports defense and aerospace applications:

Controlled baseline

One assembly and test site

One fabrication site

Extended product life cycle

Product traceability