LOW POWER SCHOTTKY

The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs. Information at input D is transferred to the Q output on the positive-going edge of

文件：102.75 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP

DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP The SN54/74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs. Information at input D is transferred

文件：73.39 Kbytes 页数：3 Pages

Motorola

摩托罗拉

DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

文件：699.19 Kbytes 页数：18 Pages

TI

德州仪器

DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLIP-FLOPS WITH PRESET AND CLEAR

文件：1.26312 Mbytes 页数：21 Pages

TI

德州仪器

LOW POWER SCHOTTKY

ONSEMI

安森美半导体

10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS

10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS The SN54/74LS147 and the SN54/74LS148 are Priority Encoders. They provide priority decoding of the inputs to ensure that only the highest order dataline is encoded.Both devices have data inputs and outputs which are active at the low lo

文件：231.44 Kbytes 页数：7 Pages

Motorola

摩托罗拉

10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS

10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS The SN54/74LS147 and the SN54/74LS148 are Priority Encoders. They provide priority decoding of the inputs to ensure that only the highest order dataline is encoded.Both devices have data inputs and outputs which are active at the low lo

文件：231.44 Kbytes 页数：7 Pages

Motorola

摩托罗拉

LOW POWER SCHOTTKY

The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs. Information at input D is transferred to the Q output on the positive-going edge of

文件：102.75 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

LOW POWER SCHOTTKY

The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs. Information at input D is transferred to the Q output on the positive-going edge of

文件：102.75 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

LOW POWER SCHOTTKY

The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs. Information at input D is transferred to the Q output on the positive-going edge of

文件：102.75 Kbytes 页数：8 Pages

ONSEMI

安森美半导体