Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs

General Description This device contains two independent positive-edge-triggered D flip-flops with complementary outputs. The information on the D input is accepted by the flip-flops on the positive going edge of the clock pulse. The triggering occurs at a voltage level and is not directly relate

文件：67.29 Kbytes 页数：6 Pages

Fairchild

仙童半导体

SEMICONDUCTORS

文件：2.43533 Mbytes 页数：31 Pages

ETCList of Unclassifed Manufacturers

未分类制造商

Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs

文件：136.42 Kbytes 页数：6 Pages

NSC

国半

Package：14-DIP（0.300"，7.62mm）；包装：管件 功能：设置（预设）和复位 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE DUAL 1BIT 14DIP

ONSEMI

安森美半导体