丝印：SN74LS292N；Package：PDIP；SN74LS29x Programmable Frequency Dividers and Digital Timers

1 Features • Count Divider Chain • Digitally Programmable from 22 to 2n (n = 31 for SN74LS292 , n = 15 for SN74LS294) • Useable Frequency Range from DC to 30 MHz • Easily Expandable 2 Applications • Frequency Division • Digital Timing 3 Description The SN74LS29x devices are programma

文件：406.67 Kbytes 页数：19 Pages

TI

德州仪器

丝印：SN74LS293N；Package：PDIP；DECADE AND 4-BIT BINARY COUNTERS

GND and Vcc on Corner Pins (Pins 7 and 14 Respectively) description The SN54290/SN74290, SNS4LS290/SN74LS290, SN54293/SN74293, and SNSALS293/SN74LS293 counters are electrically and functionally identical to the SNS490A/SN7490A, SNSALSIO/SN74LSI0, SN5493A/SN7493A, and SNSALSO3/SN74LSE3, r

文件：818.04 Kbytes 页数：16 Pages

TI

德州仪器

丝印：SN74LS293N；Package：PDIP；DECADE AND 4-BIT BINARY COUNTERS

GND and Vcc on Corner Pins (Pins 7 and 14 Respectively) description The SN54290/SN74290, SNS4LS290/SN74LS290, SN54293/SN74293, and SNSALS293/SN74LS293 counters are electrically and functionally identical to the SNS490A/SN7490A, SNSALSIO/SN74LSI0, SN5493A/SN7493A, and SNSALSO3/SN74LSE3, r

文件：818.04 Kbytes 页数：16 Pages

TI

德州仪器

丝印：SN74LS294N；Package：PDIP；SN74LS29x Programmable Frequency Dividers and Digital Timers

1 Features • Count Divider Chain • Digitally Programmable from 22 to 2n (n = 31 for SN74LS292 , n = 15 for SN74LS294) • Useable Frequency Range from DC to 30 MHz • Easily Expandable 2 Applications • Frequency Division • Digital Timing 3 Description The SN74LS29x devices are programma

文件：406.67 Kbytes 页数：19 Pages

TI

德州仪器

丝印：SN74LS294N；Package：PDIP；SN74LS29x Programmable Frequency Dividers and Digital Timers

1 Features • Count Divider Chain • Digitally Programmable from 22 to 2n (n = 31 for SN74LS292 , n = 15 for SN74LS294) • Useable Frequency Range from DC to 30 MHz • Easily Expandable 2 Applications • Frequency Division • Digital Timing 3 Description The SN74LS29x devices are programma

文件：406.67 Kbytes 页数：19 Pages

TI

德州仪器

丝印：SN74LS297N；Package：PDIP；DIGITAL PHASE-LOCKED-LOOP FILTERS

Digital Design Avoids Analog Compensation Errors Easily Cascadable for Higher Order Loops Useful Frequency from DC to: 50 MHz Typical (K Clock) 35 MHz Typical (I/D Clock)

文件：477.53 Kbytes 页数：10 Pages

TI

德州仪器

丝印：SN74LS297N；Package：PDIP；DIGITAL PHASE-LOCKED-LOOP FILTERS

Digital Design Avoids Analog Compensation Errors Easily Cascadable for Higher Order Loops Useful Frequency from DC to: 50 MHz Typical (K Clock) 35 MHz Typical (I/D Clock)

文件：477.53 Kbytes 页数：10 Pages

TI

德州仪器

丝印：SN74LS298N；Package：PDIP；QUADRUPLE 2-INPUT MULTIPLEXERS WITH STORAGE

Selects One of Two 4-Bit Data Sources | and Stores Data Synchronously with | System Clock | Applications: | Dual Source for Operands and Constants | in Arithmetic Processor; Can Release | Processor Register Files for Acquiring New | Data | Implement Separate Registers Capable of | Paralle

文件：311.49 Kbytes 页数：9 Pages

TI

德州仪器

丝印：SN74LS298N；Package：PDIP；QUADRUPLE 2-INPUT MULTIPLEXERS WITH STORAGE

Selects One of Two 4-Bit Data Sources | and Stores Data Synchronously with | System Clock | Applications: | Dual Source for Operands and Constants | in Arithmetic Processor; Can Release | Processor Register Files for Acquiring New | Data | Implement Separate Registers Capable of | Paralle

文件：311.49 Kbytes 页数：9 Pages

TI

德州仪器

丝印：SN74LS348N；Package：PDIP；8-LINE TO 3-LINE PRIORITY ENCODERS WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Encodes 8 Data Lines to 3-Line Binary (Octal) Applications Include: N-Bit Encoding Code Converters and Generators Typical Data Delay... 15 ns Typical Power Dissipation . . . 60 mW description These TTL encoders feature priority decoding of the in

文件：420.81 Kbytes 页数：9 Pages

TI

德州仪器