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SN74LS240NE4

丝印:SN74LS240N;Package:PDIP;SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件:1.80212 Mbytes 页数:41 Pages

TI

德州仪器

SN74LS241N

丝印:SN74LS241N;Package:PDIP;SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件:1.80265 Mbytes 页数:41 Pages

TI

德州仪器

SN74LS241N

丝印:SN74LS241N;Package:PDIP;SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件:1.80212 Mbytes 页数:41 Pages

TI

德州仪器

SN74LS243N

丝印:SN74LS243N;Package:PDIP;QUADRUPLE BUS TRANSCEIVERS

1FEATURES · Two-Way Asynchronous Communication Between Data Buses · PNP Inputs Reduce D-C Loading · Hysteresis (Typically 400 mV) at Inputs Improves Noise Margin DESCRIPTION These four-data-line transceivers are designed for asynchronous two-way communications between data buses. SN74LS2

文件:673.8 Kbytes 页数:18 Pages

TI

德州仪器

SN74LS243N.A

丝印:SN74LS243N;Package:PDIP;QUADRUPLE BUS TRANSCEIVERS

1FEATURES · Two-Way Asynchronous Communication Between Data Buses · PNP Inputs Reduce D-C Loading · Hysteresis (Typically 400 mV) at Inputs Improves Noise Margin DESCRIPTION These four-data-line transceivers are designed for asynchronous two-way communications between data buses. SN74LS2

文件:673.8 Kbytes 页数:18 Pages

TI

德州仪器

SN74LS243NE4

丝印:SN74LS243N;Package:PDIP;QUADRUPLE BUS TRANSCEIVERS

1FEATURES · Two-Way Asynchronous Communication Between Data Buses · PNP Inputs Reduce D-C Loading · Hysteresis (Typically 400 mV) at Inputs Improves Noise Margin DESCRIPTION These four-data-line transceivers are designed for asynchronous two-way communications between data buses. SN74LS2

文件:673.8 Kbytes 页数:18 Pages

TI

德州仪器

SN74LS244N

丝印:SN74LS244N;Package:PDIP;SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件:1.80212 Mbytes 页数:41 Pages

TI

德州仪器

SN74LS244N

丝印:SN74LS244N;Package:PDIP;SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件:1.80265 Mbytes 页数:41 Pages

TI

德州仪器

SN74LS244NE4

丝印:SN74LS244N;Package:PDIP;SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件:1.80265 Mbytes 页数:41 Pages

TI

德州仪器

SN74LS244NE4

丝印:SN74LS244N;Package:PDIP;SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件:1.80212 Mbytes 页数:41 Pages

TI

德州仪器

技术参数

  • Supply voltage (Min) (V):

    4.75

  • Supply voltage (Max) (V):

    5.25

  • Number of channels (#):

    4

  • Inputs per channel:

    2

  • IOL (Max) (mA):

    8

  • IOH (Max) (mA):

    -0.4

  • Input type:

    Bipolar

  • Output type:

    Push-Pull

  • Features:

    High speed (tpd 10- 50ns)

  • Data rate (Max) (Mbps):

    35

  • Rating:

    Catalog

供应商型号品牌批号封装库存备注价格
TI
25+
SOP
2500
强调现货,随时查询!
询价
TI
07+
SOP5.2
1124
旗舰店
询价
TI
25+23+
5.2SOP14
25977
绝对原装正品全新进口深圳现货
询价
TI
07+
SSOP
1000
原装现货海量库存欢迎咨询
询价
TI
25+
DIP16
410
百分百原装正品 真实公司现货库存 本公司只做原装 可
询价
TI(德州仪器)
2447
SOIC-16
315000
40个/管一级代理专营品牌!原装正品,优势现货,长期
询价
TI
DIP
2000
正品原装--自家现货-实单可谈
询价
TMS
06+
PDIP
1000
自己公司全新库存绝对有货
询价
TI
25+
TSOP20
4500
全新原装、诚信经营、公司现货销售!
询价
TI德州仪器
22+
24000
原装正品现货,实单可谈,量大价优
询价
更多SN74LS供应商 更新时间2025-12-11 14:16:00