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SN74LS240N

丝印:SN74LS240N;Package:PDIP;SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件:1.80265 Mbytes 页数:41 Pages

TI

德州仪器

SN74LS240NE4

丝印:SN74LS240N;Package:PDIP;SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件:1.80265 Mbytes 页数:41 Pages

TI

德州仪器

SN74LS240NE4

丝印:SN74LS240N;Package:PDIP;SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件:1.80212 Mbytes 页数:41 Pages

TI

德州仪器

SN74LS241N

丝印:SN74LS241N;Package:PDIP;SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件:1.80265 Mbytes 页数:41 Pages

TI

德州仪器

SN74LS241N

丝印:SN74LS241N;Package:PDIP;SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件:1.80212 Mbytes 页数:41 Pages

TI

德州仪器

SN74LS243N

丝印:SN74LS243N;Package:PDIP;QUADRUPLE BUS TRANSCEIVERS

1FEATURES · Two-Way Asynchronous Communication Between Data Buses · PNP Inputs Reduce D-C Loading · Hysteresis (Typically 400 mV) at Inputs Improves Noise Margin DESCRIPTION These four-data-line transceivers are designed for asynchronous two-way communications between data buses. SN74LS2

文件:673.8 Kbytes 页数:18 Pages

TI

德州仪器

SN74LS243N.A

丝印:SN74LS243N;Package:PDIP;QUADRUPLE BUS TRANSCEIVERS

1FEATURES · Two-Way Asynchronous Communication Between Data Buses · PNP Inputs Reduce D-C Loading · Hysteresis (Typically 400 mV) at Inputs Improves Noise Margin DESCRIPTION These four-data-line transceivers are designed for asynchronous two-way communications between data buses. SN74LS2

文件:673.8 Kbytes 页数:18 Pages

TI

德州仪器

SN74LS243NE4

丝印:SN74LS243N;Package:PDIP;QUADRUPLE BUS TRANSCEIVERS

1FEATURES · Two-Way Asynchronous Communication Between Data Buses · PNP Inputs Reduce D-C Loading · Hysteresis (Typically 400 mV) at Inputs Improves Noise Margin DESCRIPTION These four-data-line transceivers are designed for asynchronous two-way communications between data buses. SN74LS2

文件:673.8 Kbytes 页数:18 Pages

TI

德州仪器

SN74LS244N

丝印:SN74LS244N;Package:PDIP;SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件:1.80212 Mbytes 页数:41 Pages

TI

德州仪器

SN74LS244N

丝印:SN74LS244N;Package:PDIP;SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件:1.80265 Mbytes 页数:41 Pages

TI

德州仪器

技术参数

  • Supply voltage (Min) (V):

    4.75

  • Supply voltage (Max) (V):

    5.25

  • Number of channels (#):

    4

  • Inputs per channel:

    2

  • IOL (Max) (mA):

    8

  • IOH (Max) (mA):

    -0.4

  • Input type:

    Bipolar

  • Output type:

    Push-Pull

  • Features:

    High speed (tpd 10- 50ns)

  • Data rate (Max) (Mbps):

    35

  • Rating:

    Catalog

供应商型号品牌批号封装库存备注价格
MINI
24+
SMD其他电子元
17
一级代理全新原装现货
询价
SN
24+
SOP
20000
全新原厂原装,进口正品现货,正规渠道可含税!!
询价
TI
DIP
2000
正品原装--自家现货-实单可谈
询价
TI
20+
SSOP20
11520
特价全新原装公司现货
询价
TI
25+
SOP5.2
1124
旗舰店
询价
SOP-6
654664
询价
22+
NA
3450
加我QQ或微信咨询更多详细信息,
询价
MOT
25+
SOP
2658
原装正品!现货供应!
询价
TI/德州仪器
23+
DIP-14
12700
买原装认准中赛美
询价
MOT
2016+
DIP
1950
只做原装,假一罚十,公司可开17%增值税发票!
询价
更多SN74LS供应商 更新时间2026-3-14 17:04:00