丝印：F174A；Package：SOIC；HEX D-TYPE FLIP-FLOP WITH CLEAR

• Contains Six Flip-Flops With Single-Rail Outputs • Buffered Clock and Direct Clear Inputs • Applications Include: Buffer/Storage Registers Shift Registers Pattern Generators • Fully Buffered Outputs for Maximum Isolation From External Disturbances • Package Options Include Plastic Smal

文件：310.19 Kbytes 页数：11 Pages

TI

德州仪器

丝印：SN74F174AN；Package：PDIP；HEX D-TYPE FLIP-FLOP WITH CLEAR

• Contains Six Flip-Flops With Single-Rail Outputs • Buffered Clock and Direct Clear Inputs • Applications Include: Buffer/Storage Registers Shift Registers Pattern Generators • Fully Buffered Outputs for Maximum Isolation From External Disturbances • Package Options Include Plastic Smal

文件：310.19 Kbytes 页数：11 Pages

TI

德州仪器

丝印：SN74F174AN；Package：PDIP；HEX D-TYPE FLIP-FLOP WITH CLEAR

• Contains Six Flip-Flops With Single-Rail Outputs • Buffered Clock and Direct Clear Inputs • Applications Include: Buffer/Storage Registers Shift Registers Pattern Generators • Fully Buffered Outputs for Maximum Isolation From External Disturbances • Package Options Include Plastic Smal

文件：310.19 Kbytes 页数：11 Pages

TI

德州仪器

QUADRUPLE D-TYPE FLIP-FLOP WITH CLEAR

Contains Four Flip-Flops With Double-Rail Outputs Buffered Clock and Direct Clear Inputs Applications Include: – Buffer/Storage Registers – Shift Registers – Pattern Generators description This positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic

文件：572.1 Kbytes 页数：16 Pages

TI

德州仪器

丝印：F175；Package：SOIC；QUADRUPLE D-TYPE FLIP-FLOP WITH CLEAR

Contains Four Flip-Flops With Double-Rail Outputs Buffered Clock and Direct Clear Inputs Applications Include: – Buffer/Storage Registers – Shift Registers – Pattern Generators description This positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic

文件：572.1 Kbytes 页数：16 Pages

TI

德州仪器

丝印：F175；Package：SOIC；QUADRUPLE D-TYPE FLIP-FLOP WITH CLEAR

Contains Four Flip-Flops With Double-Rail Outputs Buffered Clock and Direct Clear Inputs Applications Include: – Buffer/Storage Registers – Shift Registers – Pattern Generators description This positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic

文件：572.1 Kbytes 页数：16 Pages

TI

德州仪器

丝印：F175；Package：SOIC；QUADRUPLE D-TYPE FLIP-FLOP WITH CLEAR

Contains Four Flip-Flops With Double-Rail Outputs Buffered Clock and Direct Clear Inputs Applications Include: – Buffer/Storage Registers – Shift Registers – Pattern Generators description This positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic

文件：572.1 Kbytes 页数：16 Pages

TI

德州仪器

丝印：SN74F175N；Package：PDIP；QUADRUPLE D-TYPE FLIP-FLOP WITH CLEAR

Contains Four Flip-Flops With Double-Rail Outputs Buffered Clock and Direct Clear Inputs Applications Include: – Buffer/Storage Registers – Shift Registers – Pattern Generators description This positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic

文件：572.1 Kbytes 页数：16 Pages

TI

德州仪器

丝印：SN74F175N；Package：PDIP；QUADRUPLE D-TYPE FLIP-FLOP WITH CLEAR

Contains Four Flip-Flops With Double-Rail Outputs Buffered Clock and Direct Clear Inputs Applications Include: – Buffer/Storage Registers – Shift Registers – Pattern Generators description This positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic

文件：572.1 Kbytes 页数：16 Pages

TI

德州仪器

丝印：74F175；Package：SOP；QUADRUPLE D-TYPE FLIP-FLOP WITH CLEAR

Contains Four Flip-Flops With Double-Rail Outputs Buffered Clock and Direct Clear Inputs Applications Include: – Buffer/Storage Registers – Shift Registers – Pattern Generators description This positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic

文件：572.1 Kbytes 页数：16 Pages

TI

德州仪器