丝印：SN74F174AN；Package：PDIP；HEX D-TYPE FLIP-FLOP WITH CLEAR

• Contains Six Flip-Flops With Single-Rail Outputs • Buffered Clock and Direct Clear Inputs • Applications Include: Buffer/Storage Registers Shift Registers Pattern Generators • Fully Buffered Outputs for Maximum Isolation From External Disturbances • Package Options Include Plastic Smal

文件：310.19 Kbytes 页数：11 Pages

TI

德州仪器

Hex D Flip-Flop with Master Reset

文件：166.34 Kbytes 页数：8 Pages

NSC

国半

Hex D flip-flops

DESCRIPTION The 74F174 has six edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup ti

文件：75.93 Kbytes 页数：8 Pages

PHI

飞利浦

Hex D-Type Flip-Flop with Master Reset

General Description The 74F174 is a high-speed hex D-type flip-flop. The device is used primarily as a 6-bit edge-triggered storage register. The information on the D inputs is transferred to storage during the LOW-to-HIGH clock transition. The device has a Master Reset to simultaneously clear

文件：57.44 Kbytes 页数：6 Pages

Fairchild

仙童半导体