丝印：SN74F175N；Package：PDIP；QUADRUPLE D-TYPE FLIP-FLOP WITH CLEAR

Contains Four Flip-Flops With Double-Rail Outputs Buffered Clock and Direct Clear Inputs Applications Include: – Buffer/Storage Registers – Shift Registers – Pattern Generators description This positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic

文件：572.1 Kbytes 页数：16 Pages

TI

德州仪器

QUADRUPLE D-TYPE FLIP-FLOP WITH CLEAR

Contains Four Flip-Flops With Double-Rail Outputs Buffered Clock and Direct Clear Inputs Applications Include: – Buffer/Storage Registers – Shift Registers – Pattern Generators description This positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic

文件：572.1 Kbytes 页数：16 Pages

TI

德州仪器

QUADRUPLE D-TYPE FLIP-FLOP WITH CLEAR

文件：359.72 Kbytes 页数：12 Pages

TI

德州仪器

QUADRUPLE D-TYPE FLIP-FLOP WITH CLEAR

Contains Four Flip-Flops With Double-Rail Outputs Buffered Clock and Direct Clear Inputs Applications Include: – Buffer/Storage Registers – Shift Registers – Pattern Generators description This positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic

文件：572.1 Kbytes 页数：16 Pages

TI

德州仪器