SN74CBT3383C数据手册集成电路（IC）的信号开关多路复用器解码器规格书PDF

描述 Description

The SN74CBT3383C is a high-speed TTL-compatible FET bus-exchange switch with low ON-state resistance (ron), allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBT3383C provides protection for undershoot up to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state. The SN74CBT3383C is organized as a 10-bit bus switch, or as a 5-bit bus-exchange switch with a single output-enable (BE)\\ input that provides data exchanging between four signal ports. The select (BX) input controls the data path of the bus-exchange switch. When BE\\ is low, the A port is connected to the B port, allowing bidirectional data flow between ports. When BE\\ is high, a high-impedance state exists between the A and B ports. This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off. To ensure the high-impedance state during power up or power down, BE\\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

特性 Features

• Undershoot Protection for Off-Isolation on A and B Ports Up to –2 V
• Bidirectional Data Flow, With Near-Zero Propagation Delay
• Low ON-State Resistance (ron) Characteristics (ron = 3 Typical)
• Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 8 pF Typical)
• Data and Control Inputs Provide Undershoot Clamp Diodes
• Low Power Consumption (ICC = 3 µA Max)
• VCC Operating Range From 4 V to 5.5 V
• Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
• Control Inputs Can be Driven by TTL or 5-V/3.3-V CMOS Outputs
• Ioff Supports Partial-Power-Down Mode Operation
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Performance Tested Per JESD 22
• 2000-V Human-Body Model (A114-B, Class II)
• 1000-V Charged-Device Model (C101)

• Supports Both Digital and Analog Applications: PCI Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating