SN74ALVTH16240中文资料具有总线保持、TTL 兼容型 CMOS 输入和三态输出的 16 通道、2.3V 至 3.6V 反相器数据手册TI规格书

描述 Description

The 'ALVTH16240 devices are 16-bit buffers/line drivers designed for 2.5-V or 3.3-V VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. These devices are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.The devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. The devices provide inverting outputs and symmetrical active-low output-enable (OE\\) inputs. When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE\\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The SN54ALVTH16240 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALVTH16240 is characterized for operation from -40°C to 85°C.

特性 Features

• State-of-the-Art Advanced BiCMOS Technology (ABT) WidebusTM Design for 2.5-V and 3.3-V Operation and Low Static Power Dissipation
• Typical VOLP (Output Ground Bounce) CC = 3.3 V, TA = 25°C
• Power Off Disables Outputs, Permitting Live Insertion
• Use Bus Hold on Data Inputs in Place of External Pullup/Pulldown Resistors to Prevent the Bus From Floating
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• Flow-Through Architecture Facilitates Printed Circuit Board Layout
• Package Options Include Plastic Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG), Thin Very Small-Outline (DGV) Packages, and 380-mil Fine-Pitch Ceramic Flat (WD) Package
Widebus is a trademark of Texas Instruments Incorporated.