SN74ALVCH16825DL集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF中文资料

SN74ALVCH16825DL属于集成电路（IC）的缓冲器驱动器接收器收发器。由德州仪器制造生产的SN74ALVCH16825DL缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。

FEATURES

· Member of the Texas Instruments Widebus™

Family

· EPIC™ (Enhanced-Performance Implanted

CMOS) Submicron Process

· ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

· Latch-Up Performance Exceeds 250 mA Per

JESD 17

· Bus Hold on Data Inputs Eliminates the Need

for External Pullup/Pulldown Resistors

· Package Options Include Plastic 300-mil

Shrink Small-Outline (DL) and Thin Shrink

Small-Outline (DGG) Packages

DESCRIPTION

This 18-bit buffer and line driver is designed for

1.65-V to 3.6-V VCC operation.

This SN74ALVCH16825 improves the performance

and density of 3-state memory address drivers, clock

drivers, and bus-oriented receivers and transmitters.

The device can be used as two 9-bit buffers or one

18-bit buffer. It provides true data.

The 3-state control gate is a 2-input AND gate with

active-low inputs so that if either output-enable (OE1

or OE2) input is high, all nine affected outputs are in

the high-impedance state.

To ensure the high-impedance state during power up

or power down, OE should be tied to VCC through a

pullup resistor; the minimum value of the resistor is

determined by the current-sinking capability of the

driver.

Active bus-hold circuitry is provided to hold unused or floating inputs at a valid logic level.

The SN74ALVCH16825 is characterized for operation from -40°C to 85°C.