丝印：SN54LS173AJ；Package：CDIP；4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS

3-State Outputs Interface Directly With System Bus Gated Output-Control LInes for Enabling or Disabling the Outputs Fully Independent Clock Virtually Eliminates Restrictions for Operating in One of Two Modes: – Parallel Load – Do Nothing (Hold) For Application as Bus Buffer Registers Pac

文件：966.44 Kbytes 页数：19 Pages

TI

德州仪器

丝印：SN54LS173AJ；Package：CDIP；4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS

3-State Outputs Interface Directly With System Bus Gated Output-Control LInes for Enabling or Disabling the Outputs Fully Independent Clock Virtually Eliminates Restrictions for Operating in One of Two Modes: – Parallel Load – Do Nothing (Hold) For Application as Bus Buffer Registers Pac

文件：966.44 Kbytes 页数：19 Pages

TI

德州仪器

丝印：SN54LS173AJ；Package：CDIP；4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS

3-State Outputs Interface Directly With System Bus Gated Output-Control LInes for Enabling or Disabling the Outputs Fully Independent Clock Virtually Eliminates Restrictions for Operating in One of Two Modes: – Parallel Load – Do Nothing (Hold) For Application as Bus Buffer Registers Pac

文件：966.44 Kbytes 页数：19 Pages

TI

德州仪器

丝印：SN54LS173AJ；Package：CDIP；4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS

3-State Outputs Interface Directly With System Bus Gated Output-Control LInes for Enabling or Disabling the Outputs Fully Independent Clock Virtually Eliminates Restrictions for Operating in One of Two Modes: – Parallel Load – Do Nothing (Hold) For Application as Bus Buffer Registers Pac

文件：966.44 Kbytes 页数：19 Pages

TI

德州仪器

4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS

文件：562.82 Kbytes 页数：19 Pages

TI

德州仪器

4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS

文件：497.3 Kbytes 页数：20 Pages

TI

德州仪器