N-Channel 20-V (D-S) MOSFET

DESCRIPTION The attached spice model describes the typical electrical characteristics of the n-channel vertical DMOS. The subcircuit model is extracted and optimized over the −55 to 125°C temperature ranges under the pulsed 0-V to 4.5-V gate drive. The saturated output impedance is best fit at th

文件：249.2 Kbytes 页数：3 Pages

VishayVishay Siliconix

威世威世科技公司

N-Channel 40-V (D-S) MOSFET

FEATURES • Halogen-free According to IEC 61249-2-21 Definition • TrenchFET® Gen II Power MOSFET • Ultra Low Thermal Resistance Using Top- Exposed PolarPAK® Package for Double-Sided Cooling • Leadframe-Based New Encapsulated Package - Die Not Exposed - Same Layout Regardless of Die Size •

文件：194.88 Kbytes 页数：10 Pages

VishayVishay Siliconix

威世威世科技公司

N-Channel 40-V (D-S) MOSFET

FEATURES • Halogen-free According to IEC 61249-2-21 Definition • TrenchFET® Gen II Power MOSFET • Ultra Low Thermal Resistance Using Top- Exposed PolarPAK® Package for Double-Sided Cooling • Leadframe-Based New Encapsulated Package - Die Not Exposed - Same Layout Regardless of Die Size •

文件：194.88 Kbytes 页数：10 Pages

VishayVishay Siliconix

威世威世科技公司

N-Channel 30-V (D-S) MOSFET

FEATURES • Extremely Low Qgd WFET® Technology for    Low Switching Losses • Ultra Low Thermal Resistance Using    Top-Exposed PolarPAK® Package for    Double-Sided Cooling • Leadframe-Based New Encapsulated Package    - Die Not Exposed    - Same Layout Regardless of Die Size • Low Qgd/Qgs

文件：222.06 Kbytes 页数：4 Pages

VishayVishay Siliconix

威世威世科技公司

N-Channel 25 V (D-S) MOSFET

FEATURES • TrenchFET® Gen III power MOSFET • Ultra low thermal resistance using top-exposed PolarPAK® package for double-sided cooling • Leadframe-based encapsulated package - Die not exposed - Same layout regardless of die size,  100 V • Low Qgd/Qgs ratio helps prevent shoot-through •

文件：230.02 Kbytes 页数：10 Pages

VishayVishay Siliconix

威世威世科技公司

N-Channel 25 V (D-S) MOSFET

FEATURES • TrenchFET® Gen III power MOSFET • Ultra low thermal resistance using top-exposed PolarPAK® package for double-sided cooling • Leadframe-based encapsulated package - Die not exposed - Same layout regardless of die size,  100 V • Low Qgd/Qgs ratio helps prevent shoot-through •

文件：230.02 Kbytes 页数：10 Pages

VishayVishay Siliconix

威世威世科技公司

N-Channel 30-V (D-S) MOSFET with Schottky Diode

文件：210.07 Kbytes 页数：10 Pages

VishayVishay Siliconix

威世威世科技公司

N-Channel 30-V (D-S) MOSFET with Schottky Diode

文件：210.07 Kbytes 页数：10 Pages

VishayVishay Siliconix

威世威世科技公司

N-Channel 30-V (D-S) MOSFET with Schottky Diode

文件：210.07 Kbytes 页数：10 Pages

VishayVishay Siliconix

威世威世科技公司

N-Channel 30-V (D-S) MOSFET

文件：196.54 Kbytes 页数：10 Pages

VishayVishay Siliconix

威世威世科技公司