RTL8306H数据手册Realtek中文资料规格书

描述 Description

The RTL8306H is a new generation of Ethernet switch controllers that integrate four HDMI Ethernet and Audio Return Channel (HEAC) transceivers, one Gigabit Physical layer transceiver for 1000Base-T, 100Base-TX and 10Base-T operation, and one Fast Ethernet Physical layer transceiver for 100Base-TX and 10Base-T operation.
The RTL8306H can smoothly forward Ethernet traffic between the Gigabit Ethernet, Fast Ethernet, and HEAC ports at wire speed. All MAC functions, VLAN, QoS, etc., are equally applied to all ports. The RTL8306H is ideal for applications such as DTV, Blu-ray player, and HDMI repeaters that implement the HDMI1.4 and IEEE 802.3 Ethernet function.
The RTL8306H HEAC PHY provides a full duplex 100Mbps Ethernet link via one differential pair. The HEAC PHY can also carry IEC 60958-1 standard audio data from an HDMI sink to an HDMI source or Repeater simultaneously.
The RTL8306H features an embedded 8051 CPU to execute the programs in the internal 64K ROM, external SPI flash, or the external EEPROM. With the embedded 8051 and internal memory controller, the RTL8306H supports IGMP/MLD snooping and Rapid Spanning Tree Protocol (RSTP) functions without any additional external CPU loading.
The RTL8306H provides a 2K-entry table and 16-entry CAM with a 4-way hash algorithm for layer-2 MAC address learning and searching, and a 128-entry IGMP Group table with 8-way hash table for IP multicast forwarding.
With four physical queues in each port, the RTL8306H provides four types of packet scheduling, including SP (Strict Priority), WRR (Weighted Round Robin), WFQ (Weighted Fair Queuing) and IEEE 802.1-Qav specified Credit-Based Shaper (CBS) for Ethernet AV. These QoS mechanisms fulfill the QoS requirements in the HDMI 1.4 Specification. Per-port ingress/egress bandwidth control and per-port/per-queue egress bandwidth control are supported.
The RTL8306H supports a 64-entry Access Control List (ACL) that parses various protocol packet types and performs configurable actions, e.g. Permit/Drop, redirect, and traffic policing.
For power saving purposes, the RTL8306H supports Realtek’s Green Ethernet, IEEE 802.3az Energy Efficient Ethernet (EEE), and Wake-On-LAN (WOL) functions to reduce both chip and whole system power consumption.

特性 Features

Interfaces

Integrates four HEAC PHYs, one Gigabit PHY, and one FE PHY
Supports one Channel SPDIF IO for Audio Return Channel
I2C slave mode for external CPU access
SPI Flash interface
GPIO and Parallel LED
Layer2 Address Lookup

High performance wire-speed layer-2 forwarding
IVL, SVL, IVL/SVL
2K 4-way lookup engine and 16-entry CAM
Static entry
Source MAC blocking/Destination MAC blocking
Aging time from 0.1s to 20132s
VLAN

Port based, Port and Protocol based, IP-subnet based, MAC based, Application-port based, 802.1Q Tag-based VLAN
128 VLAN entry and 16 entry CAM, 4-way hash
Supports 802.1ad or Q-in-Q
VLAN translation for ingress
CVID Restoration 
Loop Detection and Prevention

Supports 802.1d/1s/1w
15 spanning tree instances
Supports RSTP without extra loading on external CPU 
IGMP/MLD Snooping

Supports IGMP v1/v2/v3 (include/exclude mode) and MLD v1/v2 snooping without extra loading on external CPU
128-entry IGMP Group Table, 8-way hash
Supports IGMP/MLD Snooping without extra loading on external CPU
Power Saving

Supports IEEE 802.3az (Energy Efficient Ethernet, EEE)
Realtek Green Ethernet
Supports WOL 
IEEE 802.1X

Port-based IEEE 802.1X
MAC-based IEEE 802.1X 
Port Mirror

TX and RX mirror
Good packet, bad packet, unicast packet, multicast and broadcast packet mirror filter, drop packet mirror filter
Original packet mirror and modified packet mirror
ACL based flow mirror 
Storm Suppression

Supports Broadcast, Multicast Unknown Unicast, Unknown Multicast storm filter
Access Control List (ACL)

Supports 64-entry ACL
Supports MAC, LLC, ARP, TCP, UDP, ICMP, IGMP
Supports per-flow traffic policing
Supports VID range/IPv4 range/layer4 port range/source port mask/packet length range checking 
QoS

Supports 4 priority queues
Supports min-max scheduling
Supports Strict Priority/WRR/WFQ scheduling algorithm
Supports Credit-Based Shaper (CBS) algorithm for Ethernet AV
Supports input bandwidth control from 8Kbps to 1Gbps by step 8kbps 
Ethernet AV

Supports Precision Time Protocol
Supports Credit-Based Shaper (CBS) algorithm
Supports Priority Regeneration 
Packet Modifier

Add, modify, or remove outer-tag and/or inner-tag
Modify IP TOS field
L2 Checksum recalculation
Port isolation

Provides traffic isolation between different physical ports
MIB

MIB-II and interface MIB (RFC 1213 & 2863)
Ethernet-like MIB (RFC 3635)
RMON (RFC 1757)
Bridge MIB (RFC 4188) 
Embedded 8051

Boot from EEPROM/SPI FLASH/Internal ROM
Implement the IGMP/MLD Snooping and RSTP 
Process and Package

0.11µm CMOS process
3.3V/1.2V dual power input
QFN64

应用 Application

DTV Application