| 型号 | 下载 订购 | 功能描述 | 制造商 上传企业 | LOGO |
|---|---|---|---|---|
Cost-Effective, 2A Sink/Source Bus Termination Regulator General Description The RT9173C is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR) memory system to comply with the JEDEC SSTL_2 and SSTL_18 or other specific interfaces such as HSTL, SCSI-2 and SCSI-3 etc. devices requ 文件：225.03 Kbytes 页数：13 Pages | RichTek 立锜科技 | RichTek | ||
Cost-Effective, 2A Sink/Source Bus Termination Regulator General Description The RT9173C is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR) memory system to comply with the JEDEC SSTL_2 and SSTL_18 or other specific interfaces such as HSTL, SCSI-2 and SCSI-3 etc. devices requ 文件：225.03 Kbytes 页数：13 Pages | RichTek 立锜科技 | RichTek | ||
1.5A/3A Bus Termination Regulator General Description The RT9173/A regulator is designed to convert voltage supplies ranging from 1.6V to 6V into a desired output voltage which adjusted by two external voltage divider resistors. The regulator is capable of sourcing or sinking up to 3A of peak current while regulating an output 文件：198.64 Kbytes 页数：10 Pages | RichTek 立锜科技 | RichTek | ||
Cost-Effective, Peak 3A Sink/Source Bus Termination Regulator General Description The RT9173D is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR) memory system to comply with the JEDEC SSTL_2 and SSTL_18 or other specific interfaces such as HSTL, SCSI-2 and SCSI-3 etc. devices requ 文件：223.6 Kbytes 页数：13 Pages | RichTek 立锜科技 | RichTek | ||
Cost-Effective, Peak 3A Sink/Source Bus Termination Regulator General Description The RT9173D is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR) memory system to comply with the JEDEC SSTL_2 and SSTL_18 or other specific interfaces such as HSTL, SCSI-2 and SCSI-3 etc. devices requ 文件：223.6 Kbytes 页数：13 Pages | RichTek 立锜科技 | RichTek | ||
Cost-Effective, Peak 3A Sink/Source Bus Termination Regulator General Description The RT9173D is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR) memory system to comply with the JEDEC SSTL_2 and SSTL_18 or other specific interfaces such as HSTL, SCSI-2 and SCSI-3 etc. devices requ 文件：223.6 Kbytes 页数：13 Pages | RichTek 立锜科技 | RichTek | ||
Peak 3A Bus Termination Regulator 文件：306.32 Kbytes 页数：13 Pages | RichTek 立锜科技 | RichTek | ||
Peak 3A Bus Termination Regulator 文件：306.32 Kbytes 页数：13 Pages | RichTek 立锜科技 | RichTek | ||
Peak 3A Bus Termination Regulator 文件：306.32 Kbytes 页数：13 Pages | RichTek 立锜科技 | RichTek | ||
Peak 3A Bus Termination Regulator 文件：306.32 Kbytes 页数：13 Pages | RichTek 立锜科技 | RichTek |
技术参数
- Memory Supported：
DDRI;DDRII
- Vin(min)(V)：
1.5
- Vin(max)(V)：
2.5
- VTT Output Tolerance(max)(+/- mV)：
20
- Isource/Isink(max)(A)：
1.5
- Standby Current(typ)(mA)：
0.05
- Features：
Enable Input;OCP
- Package Type：
SOP-8;TO-252-5;TO-263-5
| 供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
RICHTEK/立锜 |
2025+ |
SOP8 |
5000 |
原装进口,免费送样品! |
询价 | ||
24+ |
5000 |
公司存货 |
询价 | ||||
RICHTEK |
25+ |
SOP8 |
20 |
百分百原装正品 真实公司现货库存 本公司只做原装 可 |
询价 | ||
RTCHTEK |
25+ |
SOP3.9-8 |
2987 |
只售原装自家现货!诚信经营!欢迎来电! |
询价 | ||
RICHTEK |
23+ |
SOP8 |
8650 |
受权代理!全新原装现货特价热卖! |
询价 | ||
RICHTEK/立锜 |
24+ |
30741 |
原装正品现货供应 |
询价 | |||
RT |
20+ |
SOP8 |
2960 |
诚信交易大量库存现货 |
询价 | ||
LINEAR/凌特 |
23+ |
SOP-8 |
69820 |
终端可以免费供样,支持BOM配单! |
询价 | ||
RT |
04+ |
SOP |
19 |
普通 |
询价 | ||
立绮 |
2447 |
SOP-8 |
100500 |
一级代理专营品牌!原装正品,优势现货,长期排单到货 |
询价 |
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