首页>RM5261A>规格书详情

RM5261A中文资料PMC数据手册PDF规格书

PDF无图
厂商型号

RM5261A

功能描述

RM5261A??Microprocessor with 64-Bit System Bus Data Sheet Preliminary

文件大小

683.05 Kbytes

页面数量

42

生产厂商

PMC

网址

网址

数据手册

下载地址一下载地址二

更新时间

2026-1-30 22:58:00

人工找货

RM5261A价格和库存,欢迎联系客服免费人工找货

RM5261A规格书详情

Hardware Overview

The RM5261A offers a high-level of integration targeted at high-performance embedded applications. The key elements of the RM5261A are briefly described below.

特性 Features

• Dual Issue superscalar microprocessor

• 250, 300, and 350 MHz operating frequencies

• Up to 420 Dhrystone 2.1 MIPS

• High-performance system interface

• 64-bit multiplexed system address/data bus for optimum price/performance

• High-performance write protocols maximize uncached write bandwidth

• Processor clock multipliers 2, 2.5, 3, 3.5, 4, 4.5, 5, 6, 7, 8, 9

• IEEE 1149.1 JTAG boundary scan

• Integrated on-chip caches

• 32 KB instruction and 32 KB data — 2 way set associative

• Per set locking

• Virtually indexed, physically tagged

• Write-back and write-through on a per page basis

• Pipeline restart on first doubleword for data cache misses

• Integrated memory management unit

• Fully associative joint TLB (shared by I and D translations)

• 48 dual entries map 96 pages

• Variable page size (4 KB to 16 MB in 4x increments)

• High-performance floating-point unit: up to 700 MFLOPS

• Single cycle repeat rate for common single-precision operations and some double-precision operations

• Two cycle repeat rate for double-precision multiply and double precision combined multiply-add operations

• Single cycle repeat rate for single-precision combined multiply-add operation

• MIPS IV instruction set

• Floating point multiply-add instruction increases performance in signal processing and graphics applications

• Conditional moves to reduce branch frequency

• Index address modes (register + register)

• Embedded application enhancements

• Specialized DSP integer Multiply-Accumulate instructions and 3-operand multiply instruction

• I and D cache locking by set

• Optional dedicated exception vector for interrupts

• Fully static 0.18 micron CMOS design with power down logic

• Standby reduced power mode with WAIT instruction

• 1.65 V or 1.8 V core with 3.3 V or 2.5 V I/O

• 208-pin QFP package

产品属性

  • 型号:

    RM5261A

  • 制造商:

    PMC

  • 制造商全称:

    PMC

  • 功能描述:

    64-Bit MIPS RISC Microprocessor with 32/64-Bit System Bus

供应商 型号 品牌 批号 封装 库存 备注 价格
PMC
2016+
QFP
9000
只做原装,假一罚十,公司可开17%增值税发票!
询价
QED
23+
QFP
20000
全新原装假一赔十
询价
PMC
24+
QFP208
20000
全新原厂原装,进口正品现货,正规渠道可含税!!
询价
PMC
25+
25
公司优势库存 热卖中!
询价
PMC
23+
QFP
65480
询价
PMC
23+
QFP
3600
绝对全新原装!现货!特价!请放心订购!
询价
PMCQED
20+
QFP204
35830
原装优势主营型号-可开原型号增税票
询价
PMC
2223+
QFP208
26800
只做原装正品假一赔十为客户做到零风险
询价
PMC
23+
QFP208
66600
专业芯片配单原装正品假一罚十
询价
PMC
ROHS+Original
NA
84
专业电子元器件供应链/QQ 350053121 /正纳电子
询价