RC19024中文资料PCIe Gen6 24-Output Clock Buffer数据手册Renesas规格书

描述 Description

The RC19024 is a 24-output PCIe Gen6 buffer that is backward compatible to earlier PCIe generations. The RC19024 provides ultra-low additive jitter and reduced in-to-out delay performance for better design-margin and incorporates several features for easier and more robust design.

特性 Features

• LP-HCSL outputs eliminate up to 96 terminated resistors
• PCIe Gen 1–6 compliance
• Drive both source-terminated and double-terminated loads
• Selectable output slew rate via SMBus
• Supports 85Ω output impedance
• Open-drain LOS (Loss-Of-Signal) indication output
• Power down tolerance (PDT)
• Flexible startup sequencing (FSS)
• Automatic clock parking (ACP)
• Dedicated OE# pins to control group output
• 4-wire Side-Band interface and device daisy-chaining 
• SMBus write protection features with 9 selectable addresses
• 8 × 8 mm 100-GQFN package