Low Power, High Function Microcontrollers for General Purpose Applications

The RL78/G13 microcontrollers balance the industry's lowest level of consumption current (CPU: 66 μA/MHz, standby (STOP): 230 nA) and a high performance of 43.2 DMIPS (32 MHz). They have an on-chip oscillator, data flash, A/D converter, and more. Built-in safety features (function that detects illeg • CPU: RL78 core, Max. 32MHz\n• Voltage: 1.6V to 5.5V\n• Package: 64-pin HTFQFP, 24 to 48-pin HWQFN, 48 to 128-pin LFQFP, 44 to 100-pin LQFP, 20 to 30-pin LSSOP, 64-pin VFBGA, 25 to 36-pin WFLGA\n• Memory: SRAM Max. 32KB, Program Flash Max. 512KB\n• Timer: 16-bit Timer (ch) x 8, 8-bit Timer (ch) x 8;

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瑞萨

True low-power platform (66 μA/MHz, and 0.57 μA for operation with only RTC and LVD) for the general-purpose applications, with 1.6-V to 5.5-V operation, 16- to 512-Kbyte code flash memory, and 41 DMIPS at 32 MHz

1.1 Features Ultra-low power consumption technology  VDD = single power supply voltage of 1.6 to 5.5 V  HALT mode  STOP mode  SNOOZE mode RL78 CPU core  CISC architecture with 3-stage pipeline  Minimum instruction execution time: Can be changed from high speed (0.03125 μs: @ 32 MHz

文件：3.45818 Mbytes 页数：207 Pages

RENESAS

瑞萨

True low-power platform (66 μA/MHz, and 0.57 μA for operation with only RTC and LVD) for the general-purpose applications, with 1.6-V to 5.5-V operation, 16- to 512-Kbyte code flash memory, and 41 DMIPS at 32 MHz

1.1 Features Ultra-low power consumption technology  VDD = single power supply voltage of 1.6 to 5.5 V  HALT mode  STOP mode  SNOOZE mode RL78 CPU core  CISC architecture with 3-stage pipeline  Minimum instruction execution time: Can be changed from high speed (0.03125 μs: @ 32 MHz

文件：3.45818 Mbytes 页数：207 Pages

RENESAS

瑞萨

True low-power platform (66 μA/MHz, and 0.57 μA for operation with only RTC and LVD) for the general-purpose applications, with 1.6-V to 5.5-V operation, 16- to 512-Kbyte code flash memory, and 41 DMIPS at 32 MHz

1.1 Features Ultra-low power consumption technology  VDD = single power supply voltage of 1.6 to 5.5 V  HALT mode  STOP mode  SNOOZE mode RL78 CPU core  CISC architecture with 3-stage pipeline  Minimum instruction execution time: Can be changed from high speed (0.03125 μs: @ 32 MHz

文件：3.45818 Mbytes 页数：207 Pages

RENESAS

瑞萨