PLS173N中文资料飞利浦数据手册PDF规格书

DESCRIPTION

The PLS173 is a two-level logic element consisting of 42 AND gates and 10 OR gates with fusible link connections for programming I/O polarity and direction. All AND gates are linked to 12 inputs (I) and

10 bidirectional I/O lines (B). These yield variable I/O gate configurations via 10 direction control gates (D), ranging from 22 inputs to 10 outputs.

FEATURES

• I/O propagation delay: 30ns (max.)

• 12 inputs

• 42 AND gates

• 10 OR gates

• 10 bidirectional I/O lines

• Active-High or -Low outputs

• 42 product terms:

– 32 logic terms

– 10 control terms

• Ni-Cr programmable links

• Input loading: –100µA (max.)

• Power dissipation: 750mW (typ.)

• 3-State outputs

• TTL compatible

APPLICATIONS

• Random logic

• Code converters

• Fault detectors

• Function generators

• Address mapping

• Multiplexing