PLS101N中文资料飞利浦数据手册PDF规格书

DESCRIPTION

The PLS100 (3-State) and PLS101 (Open Collector) are bipolar, fuse Programmable Logic Arrays (PLAs). Each device utilizes the standard AND/OR/Invert architecture to directly implement custom sum of product equations.

FEATURES

• Field-programmable (Ni-Cr link)

• Input variables: 16

• Output functions: 8

• Product terms: 48

• I/O propagation delay: 50ns (max.)

• Power dissipation: 600mW (typ.)

• Input loading: –100µA (max.)

• Chip Enable input

• Output option:

– PLS100: 3-State

– PLS101: Open-Collector

• Output disable function:

– 3-State: Hi-Z

– Open-Collector: High

APPLICATIONS

• CRT display systems

• Code conversion

• Peripheral controllers

• Function generators

• Look-up and decision tables

• Microprogramming

• Address mapping

• Character generators

• Data security encoders

• Fault detectors

• Frequency synthesizers

• 16-bit to 8-bit bus interface

• Random logic replacement