PL138中文资料Fanout Buffers Products数据手册Microchip规格书

描述 Description

The PL138-48 family is a high performance low-cost 1:4 outputs Differential LVPECL fanout buffer.The family of Differential LVPECL buffers are designed to operate from a single power supply of 2.5V±5% or 3.3V±10%. The differential input pairs are designed to accept most standard input signal levels, using an appropriate resistor bias network, and produce a high quality set of outputs with the lowest possible skew on the outputs, which is guaranteed for part-to-part or lot-to lot skew.Designed to fit in a small form-factor package, PL138 family offers up to 1GHz of output operation with very low-power consumption, and lowest additive jitter of any comparable device. The Output Enable feature, when activated, allows the IC to consume less than 10µA of current.

特性 Features

·Four differential 2.5V/3.3V LVPECL output pairs
·Output Frequency: ≤1GHz
·Two selectable differential input pairs
·Translates any standard single-ended or differential input format to LVPECL output. It can accept the following standard input formats and more:·LVPECL, LVCMOS, LVDS, HCSL, SSTL, LVHSTL, CML

·Output Skew: 25ps (typ.)
·Part-to-part skew: 140ps (typ.)
·Propagation delay: 1.5ns (typ.)
·Additive Jitter: <100fs (typ.)
·Operating Supply Voltage: 2.375V ~ 3.63V
·Operating temperature range from -40°C to 85°C
·Package availability: 20-pin TSSOP