丝印：PJ；Package：SOT886；Low-power Schmitt trigger

1. General description The 74AUP1G17 is a single buffer with Schmitt-trigger input. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitr

文件：321.24 Kbytes 页数：24 Pages

NEXPERIA

安世

丝印：PJ；Package：SOT1115；Low-power Schmitt trigger

1. General description The 74AUP1G17 is a single buffer with Schmitt-trigger input. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitr

文件：321.24 Kbytes 页数：24 Pages

NEXPERIA

安世

丝印：PJ；Package：SOT1202；Low-power Schmitt trigger

1. General description The 74AUP1G17 is a single buffer with Schmitt-trigger input. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitr

文件：321.24 Kbytes 页数：24 Pages

NEXPERIA

安世

丝印：PJ；Package：SOT753；Low-power Schmitt trigger

1. General description The 74AUP1G17 is a single buffer with Schmitt-trigger input. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitr

文件：321.24 Kbytes 页数：24 Pages

NEXPERIA

安世

丝印：PJ；Package：SOT353-1；Low-power Schmitt trigger

1. General description The 74AUP1G17 is a single buffer with Schmitt-trigger input. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitr

文件：321.24 Kbytes 页数：24 Pages

NEXPERIA

安世

丝印：pJ；Package：TSSOP5；Low-power Schmitt trigger

1. General description The 74AUP1G17-Q100 is a single buffer with Schmitt-trigger input. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF cir

文件：247.18 Kbytes 页数：17 Pages

NEXPERIA

安世

丝印：PJ；Package：SOT1226-3；Low-power Schmitt trigger

1. General description The 74AUP1G17 is a single buffer with Schmitt-trigger input. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitr

文件：321.24 Kbytes 页数：24 Pages

NEXPERIA

安世

丝印：PJ；Package：SOT1269-2；Low-power Schmitt trigger

1. General description The 74AUP1G17 is a single buffer with Schmitt-trigger input. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitr

文件：321.24 Kbytes 页数：24 Pages

NEXPERIA

安世

丝印：PJ；Package：SOT-363；Small Surface Mount Transistor

Features - Low collector capacitance. - Low collector-emitter saturation voltage. - Reduces number of components and board space. - AEC-Q101 Qualified. - No mutual interference between the transistors.

文件：512.5 Kbytes 页数：6 Pages

COMCHIP

典琦

丝印：PJ；Package：TSSOP6；65 V, 100 mA NPN/PNP general-purpose transistor

Features and benefits • Low collector capacitance • Low collector-emitter saturation voltage • Closely matched current gain • Reduces number of components and board space • No mutual interference between the transistors

文件：303.65 Kbytes 页数：12 Pages

NEXPERIA

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