20-Output Low-Power Fanout Clock Buffer for PCIe 6.0 Application

Features y 20 Low-Power HCSL Outputs with On-Chip Termination y 85Ω Output Impedance y Individual Output Enable y Supports I/O Power Down Tolerant y Flexible Startup Power Sequencing y Automatic Output Clock Parking Upon Loss of Input Clock y Up to 9 Selectable SMBus Addresses y Supports S

文件：1.48236 Mbytes 页数：29 Pages

DIODES

美台半导体

Low Jitter 20-, 16-, 13-, 12-, 8- and 4-Output Clock Buffers Enhance Performance in PCIe® 6.0 Systems

文件：383.11 Kbytes 页数：2 Pages

DIODES

美台半导体

4- and 2-Output Clock Mux-Buffers with Low Jitter Enhance Performance in PCIe® 6.0 Systems

文件：506.03 Kbytes 页数：2 Pages

DIODES

美台半导体

20-Output Low-Power Fanout Clock Buffer for PCIe 6.0 Application

Features y 20 Low-Power HCSL Outputs with On-Chip Termination y 85Ω Output Impedance y Individual Output Enable y Supports I/O Power Down Tolerant y Flexible Startup Power Sequencing y Automatic Output Clock Parking Upon Loss of Input Clock y Up to 9 Selectable SMBus Addresses y Supports S

文件：1.48236 Mbytes 页数：29 Pages

DIODES

美台半导体

20-Output Low-Power Fanout Clock Buffer for PCIe 6.0 Application

Features y 20 Low-Power HCSL Outputs with On-Chip Termination y 85Ω Output Impedance y Individual Output Enable y Supports I/O Power Down Tolerant y Flexible Startup Power Sequencing y Automatic Output Clock Parking Upon Loss of Input Clock y Up to 9 Selectable SMBus Addresses y Supports S

文件：1.48236 Mbytes 页数：29 Pages

DIODES

美台半导体

20-Output Low-Power Fanout Clock Buffer for PCIe 6.0 Application

Features y 20 Low-Power HCSL Outputs with On-Chip Termination y 85Ω Output Impedance y Individual Output Enable y Supports I/O Power Down Tolerant y Flexible Startup Power Sequencing y Automatic Output Clock Parking Upon Loss of Input Clock y Up to 9 Selectable SMBus Addresses y Supports S

文件：1.48236 Mbytes 页数：29 Pages

DIODES

美台半导体

Low Jitter 20-, 16-, 13-, 12-, 8- and 4-Output Clock Buffers Enhance Performance in PCIe® 6.0 Systems

文件：383.11 Kbytes 页数：2 Pages

DIODES

美台半导体

20-Output Low-Power Fanout Clock Buffer for PCIe 6.0 Application

The PI6CB332020A is a low-power PCIe® 5.0/6.0 clock buffer. It takes a reference input to fanout 20 low-power differential HCSL outputs up to 400MHz, with on-chip terminations for 85Ω output impedance. An individual OE pin for each output provides easier power management. The device also supports Po •20 Low-Power HCSL Outputs with On-Chip Termination\n•85Ω Output Impedance\n•Individual Output Enable\n•Supports I/O Power Down Tolerant\n•Flexible Startup Power Sequencing\n•Automatic Output Clock Parking Upon Loss of Input Clock\n•Up to 9 Selectable SMBus Addresses\n•Supports SBI OE# Interface\n•D;

Diodes

美台半导体