PI6CB332012A中文资料12-Output Low-Power Fanout Clock Buffer for PCIe 6.0 Application数据手册Diodes规格书

描述 Description

The PI6CB332012A is a low-power PCIe® 5.0/6.0 clock buffer. It takes a reference input to fanout 12 low-power differential HCSL outputs up to 400MHz, with on-chip terminations for 85Ω output impedance. An individual OE pin for each output provides easier power management. The device also supports Power Down Tolerant (PDT), automatic output clock parking upon loss of input clock, and Flexible Startup Sequencing features.

特性 Features

•12 Low-Power HCSL Outputs with On-Chip Termination
•85Ω Output Impedance
•Individual Output Enable
•Power Down Tolerant Inputs
•Flexible Startup Sequencing
•Automatic Output Clock Parking Upon Loss of Input Clock
•Up to 9 Selectable SMBus Addresses
•Supports SBI OE# interface
•Differential Output-to-Output Skew <50ps
•Additive Phase Jitter•PCIe 5.0: typical 6fs RMS
•PCIe 6.0: typical 4fs RMS
•DB2000QL: typical 10fs RMS

•3V Supply Voltage
•Temperature Range: -40°C to 105°C
•Packaging (Pb-free & Green):•64-Pin, WLGA 5x5mm (FLB)

•Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
•Halogen and Antimony Free. “Green” Device (Note 3)
•For automotive applications requiring specific change control (i.e. parts qualified to AEC-Q100/101/104/200, PPAP capable, and manufactured in IATF 16949 certified facilities), please contact us or your local Diodes representative. https://www.diodes.com/quality/product-definitions/