PI6CB332001A中文资料20-Output PCIe 4.0/5.0 Clock Buffer With On-chip Termination数据手册Diodes规格书

描述 Description

The PI6CB332001A is a 20-output, very low-power, PCIe 1.0/2.0/3.0/4.0/5.0 clock buffer. The device is capable of distributing the reference clocks for UPI, SAS, SATA, and other applications. It takes a reference input to fanout twenty 100MHz lowpower differential HCSL outputs with on-chip terminations. The on-chip termination can save 80 external resistors and make layout easier. OE pins combined with SMBus bits, as well as a 3-wireside band interface, provide easier power management for each output. All OE pins are power down tolerant, which allows the OE pins to be driven by external signals when the device is in a power down or reset condition. The device must reset and powerup properly if these pins are driven to any valid voltage prior to the assertion of VDD or PWRGD#. The device uses Diodes' proprietary design to achieve very low jitter that meets PCIe 1.0/2.0/3.0/4.0/5.0 requirements.

简介

PI6CB332001A属于集成电路（IC）的时钟缓冲器驱动器。由制造生产的PI6CB332001A时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。