PI6C9911数据手册集成电路（IC）的时钟发生器PLL频率合成器规格书PDF

描述 Description

The PI6C9911 and PI6C9911E are low-skew, low jitter, 5V phase lock-loop (PLL) programmable skew clock drivers, for high-performance computing and networking applications. These parts offer user-selectable skew-control of 4 output pairs, providing the timing delays necessary to optimize high-performance clock-distribution circuits.
Each output can be hardwired to one of nine delay or function configurations. Delay increments are determined by the input clock frequency and the configurations selected by the user.
The PI6C9911 and PI6C9911E allow the REF clock input to have Spread Spectrum modulation for EMI reduction.
Both buffers are pin-compatable with Cypresss RoboClock CY7B9911, but with improved AC/DC characteristics.
The PI6C9911 and PI6C9911E also have the same pinout as Cypresss CY7B9911and with balanced output drive.Product

特性 Features

• Four pairs of programmable skew outputs
• User-selectable output functions:
   − Selectable skews
   − Inverted and noninverted
   − Operation at ‰ and … input frequency
   − Operation at 2X and 4X input frequency
• Low skew <100ps typical same pair, 250ps max.
• Allow REF clock input to have Spread Spectrum
   modulation for EMI reduction
• 2X, 4X, ‰ and … outputs
• 3-level inputs for skew and output frequency control
• External feedback, internal loop filter
• Low cycle-to-cycle Jitter: <25ps RMS
• Duty cycle of output clock signals: 45% min. 55% max.
• Same pinout as Cypress CY7B9911
• Available in 32-pin PLCC Package (J)
• Output Operation
   3.75 to 100 MHz for PI6C9911
   3.75 to 125 MHz for PI6C9911E