丝印：010110；Package：DFN1010D-3；50 V, 500 mA NPN resistor-equipped transistors

General description NPN Resistor-Equipped Transistor (RET) family in a leadless ultra small DFN1010D-3 (SOT1215) Surface-Mounted Device (SMD) plastic package with visible and solderable side pads. Features and benefits ■ 500 mA output current capability ■ Reduced pick and place costs ■ Built

文件：2.34774 Mbytes 页数：24 Pages

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丝印：010110；Package：SOT1215；50 V, 500 mA NPN resistor-equipped transistors

Features and benefits  500 mA output current capability  Built-in bias resistors   10 resistor ratio tolerance  Simplifies circuit design  Reduces component count  Reduced pick and place costs  Low package height of 0.37 mm  Suitable for Automatic Optical Inspection (AOI) of sold

文件：2.34705 Mbytes 页数：24 Pages

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50 V, 500 mA PNP resistor-equipped transistors

Features and benefits  500 mA output current capability  Built-in bias resistors   10 resistor ratio tolerance  Simplifies circuit design  Reduces component count  Reduced pick and place costs  Low package height of 0.37 mm  Suitable for Automatic Optical Inspection (AOI) of sold

文件：3.67584 Mbytes 页数：23 Pages

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50 V, 500 mA NPN resistor-equipped transistors

NPN Resistor-Equipped Transistor (RET) family in a leadless ultra small DFN1010D-3 (SOT1215) Surface-Mounted Device (SMD) plastic package with visible and solderable side pads.\nTable 1. Product overview Type mumber\n R1\n R2\n Package Nexperia\n PNP complement\n PDTD113EQA\n 1 • 500 mA output current capability\n• Built-in bias resistors\n• ±10 % resistor ratio tolerance\n• Simplifies circuit design\n• Reduces component count\n• Reduced pick and place costs\n• Low package height of 0.37 mm\n• Suitable for Automatic Optical Inspection (AOI) of solder joint\n• AEC-Q101 ;

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Package：3-XDFN 裸露焊盘；包装：卷带（TR） 类别：分立半导体产品 晶体管 - 双极（BJT）- 单，预偏置 描述：TRANS PREBIAS NPN 3DFN

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